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Development of RISC-V Based Soft-core Processor with Scalable Vector Extension for Embedded System

Published: 22 October 2021 Publication History

Abstract

Recently, the opportunity to use FPGA in the field of embedded computer system has increased. However, the development cost using FPGA is quite high. We can reduce the cost by limiting the development of the dedicated circuit to the essenially required part of the system and by using soft-core processor together. If the performance of the soft-core processor improves, the development cost can be suppressed, since the amount of the dedicated circuit can be reduced. Furthermore, even in the field of embedded system, the opportunity for data parallel processing such as image processing is increasing. We consider that it is important merit of soft-core processor with SIMD extension that the computation performance can be optimized to the system by changing the number of parallel computing units according to the application. However, it is an obstacle that the software for soft-core processor needs to be changed every time we change the number of computing units. Thus, vector processing facility should provide the scalability that means the number of computing units can be changed without changing the program code. In this paper, we develop a RISC-V based soft-core processor with the scalable vector extension.

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              cover image ACM Other conferences
              ACIT '21: Proceedings of the the 8th International Virtual Conference on Applied Computing & Information Technology
              June 2021
              147 pages
              ISBN:9781450384933
              DOI:10.1145/3468081
              Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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              New York, NY, United States

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              Published: 22 October 2021

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              Author Tags

              1. FPGA
              2. RISC-V
              3. soft-core processor
              4. vector processing

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