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A hardware/software co-design approach to prototype 6G mobile applications inside the GNU Radio SDR Ecosystem using FPGA hardware accelerators

Published: 09 June 2022 Publication History

Abstract

The novel communication 6G requires raw data rates of up to 400 Gbit s− 1 in a single Field Programmable Gate Array (FPGA) front-end. For these high data rates, a Software Defined Radio (SDR) on a multi-core processor reaches a performance limit due to technical boundaries, clock speeds and overhead in multiprocessing. Hence, additional hardware accelerators based on Application Specific Integrated Circuits (ASICs) or FPGAs are required to process those large amounts of data. In this paper, our hardware/software co-design concept is presented, which allows for the integration of hardware accelerators realized in FPGAs, to improve overall system performance. We can access the accelerators from the widely used GNU Radio, which also allows non-FPGA user to benefit from the acceleration. For this purpose, a concept to share data between Processing System (PS) and Programmable Logic (PL) is developed and evaluated regarding its suitability for high bandwidth applications. Using a common application for evaluation, we are able to compare a hardware/software co-design with an entirely software-based implementation. Resulting in an overall performance increase by a factor of up to 4.5, while serving as a foundation for an easy-to-use method for hardware accelerators in GNU Radio.

References

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Carlos J. Bernardos and Mikko A. Uusitalo. 2021. European Vision for the 6G Network Ecosystem. https://doi.org/10.5281/zenodo.5007671
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Martin Braun, Jonathan Pendlum, and Matt Ettus. 2016. RFNoC: RF Network-on-Chip. Proceedings of the GNU Radio Conference 1, 1 (Sept. 2016).
[3]
Xin Cai, Mingda Zhou, and Xinming Huang. 2017. Model-Based Design for Software Defined Radio on an FPGA. IEEE Access 5(2017), 8276–8283. https://doi.org/10.1109/ACCESS.2017.2692764
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[4] Open6GHub Forschungsprojekt.accessed 2022-03-24. https://www.open6ghub.de/
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GNU Radio project. accessed 2022-03-25. GNU Radio. https://wiki.gnuradio.org/index.php/Main_Page.
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GNU Radio project. accessed 2022-03-25. Zynq - GNU Radio. https://wiki.gnuradio.org/index.php/Zynq.
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Augusto Hoppe, Jürgen Becker, and Fernanda Lima Kastensmidt. 2020. Fine Grained Control Flow Checking with Dedicated FPGA Monitors. In 2020 IEEE 33rd International System-on-Chip Conference (SOCC). 219–224. https://doi.org/10.1109/SOCC49529.2020.9524751
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Jonathon Pendlum. 2013. GNU Radio FPGA Acceleration with Xilinx Zynq.
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Harveen Kaur, Gupta Rajat, Kulkarni Rohit, and Rege Vishwesh. accessed 2022-03-25. PYNQ Radio – Final Report. https://kastner.ucsd.edu/ryan/wp-content/uploads/sites/5/2014/03/admin/pynq_radio.pdf.
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Johannes Pfau, Maximilian Reuter, Tanja Harbaum, Klaus Hofmann, and Jurgen Becker. 2019. A Hardware Perspective on the ChaCha Ciphers: Scalable Chacha8/12/20 Implementations Ranging from 476 Slices to Bitrates of 175 Gbit/s. In 2019 32nd IEEE International System-on-Chip Conference (SOCC). IEEE, Singapore, 294–299. https://doi.org/10.1109/SOCC46988.2019.1570548289
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Abolfazl Soltani and Saeed Sharifian. 2015. An Ultra-High Throughput and Fully Pipelined Implementation of AES Algorithm on FPGA. Microprocessors & Microsystems 39, 7 (Oct. 2015), 480–493. https://doi.org/10.1016/j.micpro.2015.07.005
[12]
Richard H L Stroop. 2012. Enhancing GNU Radio for Run-Time Assembly of FPGA-Based Accelerators. Master’s thesis. Virginia Polytechnic Institute and State University, Blacksburg, Virginia.
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[13] GNU Radio Website.accessed 2022-03-24. http://www.gnuradio.org
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Xilinx Inc.accessed 2022-03-25. Python Productivity for Zynq (Pynq) Documentation. (accessed 2022-03-25), 320.

Cited By

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  • (2024)Real-Time Graph Building on FPGAs for Machine Learning Trigger Applications in Particle PhysicsComputing and Software for Big Science10.1007/s41781-024-00117-08:1Online publication date: 21-Mar-2024
  • (2023)Empowering the 6G Cellular Architecture With Open RANIEEE Journal on Selected Areas in Communications10.1109/JSAC.2023.333461042:2(245-262)Online publication date: 28-Nov-2023
  • (2023)A Scalable and Cost-Efficient Antenna Testbed Using FPGA-Server Compound Structures for Prototyping 6G Applications2023 19th International Conference on Distributed Computing in Smart Systems and the Internet of Things (DCOSS-IoT)10.1109/DCOSS-IoT58021.2023.00039(171-178)Online publication date: Jun-2023
  • Show More Cited By

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Published In

cover image ACM Other conferences
HEART '22: Proceedings of the 12th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies
June 2022
114 pages
ISBN:9781450396608
DOI:10.1145/3535044
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 09 June 2022

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Author Tags

  1. FPGA
  2. GNU Radio
  3. Hardware Accelerator
  4. Hardware/Software Co-Design
  5. PYNQ
  6. SDR

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  • Research-article
  • Research
  • Refereed limited

Funding Sources

  • Federal Ministry of Education and Research of Germany

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HEART2022

Acceptance Rates

HEART '22 Paper Acceptance Rate 10 of 21 submissions, 48%;
Overall Acceptance Rate 22 of 50 submissions, 44%

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Cited By

View all
  • (2024)Real-Time Graph Building on FPGAs for Machine Learning Trigger Applications in Particle PhysicsComputing and Software for Big Science10.1007/s41781-024-00117-08:1Online publication date: 21-Mar-2024
  • (2023)Empowering the 6G Cellular Architecture With Open RANIEEE Journal on Selected Areas in Communications10.1109/JSAC.2023.333461042:2(245-262)Online publication date: 28-Nov-2023
  • (2023)A Scalable and Cost-Efficient Antenna Testbed Using FPGA-Server Compound Structures for Prototyping 6G Applications2023 19th International Conference on Distributed Computing in Smart Systems and the Internet of Things (DCOSS-IoT)10.1109/DCOSS-IoT58021.2023.00039(171-178)Online publication date: Jun-2023
  • (2023)Improved TDD operation on Software-Defined Radio platforms towards future wireless standardsComputer Communications10.1016/j.comcom.2023.06.026209:C(178-187)Online publication date: 1-Sep-2023

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