Article

Maximum voltage variation in the power distribution network of VLSI circuits with RLC models

Authors:

Sudhakar Bobba,

Ibrahim HajjAuthors Info & Claims

ISLPED '01: Proceedings of the 2001 international symposium on Low power electronics and design

Pages 376 - 381

https://doi.org/10.1145/383082.383186

Published: 06 August 2001 Publication History

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Cited By

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Li ZYin Z(2018)A Method for Controlling Parallel and Series RLC Circuits with Time-Varying Resistance, Inductance and CapacitanceCircuits, Systems, and Signal Processing10.1007/s00034-017-0669-437:6(2629-2638)Online publication date: 27-Dec-2018
https://dl.acm.org/doi/10.1007/s00034-017-0669-4
Pant SBlaauw DZolotov VSundareswaran SPanda R(2003)Vectorless Analysis of Supply Noise Induced Delay VariationProceedings of the 2003 IEEE/ACM international conference on Computer-aided design10.5555/996070.1009888Online publication date: 9-Nov-2003
https://dl.acm.org/doi/10.5555/996070.1009888
Sanjay Pant Blaauw DZolotov VSundareswaran SPanda R(2003)Vectorless analysis of supply noise induced delay variationICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486)10.1109/ICCAD.2003.159688(184-191)Online publication date: 2003
https://doi.org/10.1109/ICCAD.2003.159688
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Maximum voltage variation in the power distribution network of VLSI circuits with RLC models
1. Hardware

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Published In

ISLPED '01: Proceedings of the 2001 international symposium on Low power electronics and design

August 2001

393 pages

ISBN:1581133715

DOI:10.1145/383082

Chairmen:
Enrico Macii
Politecnico di Torino, Turin, Italy
,
Vivek De
Intel Corporation, Hillsboro, OR
,
Mary Jane Irwin
Penn State Univ., University Park

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 06 August 2001

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ISLPED01: International Symposium on Low Power Electronics and Design

California, Huntington Beach, USA

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ISLPED '01 Paper Acceptance Rate 73 of 194 submissions, 38%;

Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

View all

Li ZYin Z(2018)A Method for Controlling Parallel and Series RLC Circuits with Time-Varying Resistance, Inductance and CapacitanceCircuits, Systems, and Signal Processing10.1007/s00034-017-0669-437:6(2629-2638)Online publication date: 27-Dec-2018
https://dl.acm.org/doi/10.1007/s00034-017-0669-4
Pant SBlaauw DZolotov VSundareswaran SPanda R(2003)Vectorless Analysis of Supply Noise Induced Delay VariationProceedings of the 2003 IEEE/ACM international conference on Computer-aided design10.5555/996070.1009888Online publication date: 9-Nov-2003
https://dl.acm.org/doi/10.5555/996070.1009888
Sanjay Pant Blaauw DZolotov VSundareswaran SPanda R(2003)Vectorless analysis of supply noise induced delay variationICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486)10.1109/ICCAD.2003.159688(184-191)Online publication date: 2003
https://doi.org/10.1109/ICCAD.2003.159688
Bobba SThorp TAingaran KLiu DErnst R(2001)IC power distribution challengesProceedings of the 2001 IEEE/ACM international conference on Computer-aided design10.5555/603095.603227(643-650)Online publication date: 4-Nov-2001
https://dl.acm.org/doi/10.5555/603095.603227
Bobba SThorp TAingaran KLiu D(2001)IC power distribution challengesIEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281)10.1109/ICCAD.2001.968729(643-650)Online publication date: 2001
https://doi.org/10.1109/ICCAD.2001.968729

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Recommendations

Analysis of power-performance for ultra-thin-body GeOI logic circuits

Various Low Power Approaches in CMOS Vlsi Circuits

Effect of Process Variation on Power and Delay in CMOS Circuits