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Chap - a SIMD graphics processor

Authors:

Adam Levinthal,

Thomas PorterAuthors Info & Claims

SIGGRAPH '84: Proceedings of the 11th annual conference on Computer graphics and interactive techniques

Pages 77 - 82

https://doi.org/10.1145/800031.808581

Published: 01 January 1984 Publication History

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Abstract

Special purpose processing systems designed for specific applications can provide extremely high performance at moderate cost. One such processor is presented for executing graphics and image processing algorithms as the basis of a digital film printer. Pixels in the system contain four parallel components: RGB for full color and an alpha channel for retaining transparency information. The data path of the processor contains four arithmetic elements connected through a crossbar network to a tessellated scratchpad memory. The single instruction, multiple data stream (SIMD) processor executes instructions on four pixel components in parallel. The instruction control unit (ICU) maintains an activity stack for tracking block-structured code, using data-dependent activity flags for conditional disabling subsets of the ALUs. Nested loops and if-then-else constructs can be programmed directly, with the ICU disabling and reenabling ALUs on the basis of their individual status bits.

References

[1]

Barnes, G., et all, The ILLIAC IV Computer. IEEE Transactions on Computers Vol C-17, No 8 (August 1968), pp 746-757.

Google Scholar

[2]

Fielding, R., The Technique of Special Effects Cinematography. Hastings House, New York, 1977.

Google Scholar

[3]

Kubo, M., Taguchi, Y., Agusa, K., Ohno, Y., A multi-microprocessor system for three dimensional color graphics. Proc of IFIP 80, 1980.

Google Scholar

[4]

Leffler, S., Chap Assembler Reference Manual. Technical Memo 98, Computer Division, Lucasfilm Ltd, December, 1983.

Google Scholar

[5]

Leffler, S., Chap Runtime Monitor Reference Manual. Technical Memo 102, Computer Division, Lucasfilm Ltd, December, 1983.

Google Scholar

[6]

Porter, T., Matte Box Design. Technical Memo 63, Computer Division, Lucasfilm Ltd, August 1983.

Google Scholar

[7]

Porter, T., Duff, T., Compositing Digital Images. Computer Graphics Vol 18, No 3, 1984, To be published

Digital Library

Google Scholar

[8]

Shapiro, H. D. Theoretical Limitations on the Efficient Use of Parallel Memories. IEEE Transactions on Computers, Vol C-27, No. 5 (May 1978),.

Google Scholar

Cited By

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Aamodt TFung WRogers T(2018)General-Purpose Graphics Processor ArchitecturesSynthesis Lectures on Computer Architecture10.2200/S00848ED1V01Y201804CAC04413:2(1-140)Online publication date: 21-May-2018
https://doi.org/10.2200/S00848ED1V01Y201804CAC044
ElTantawy AAamodt THsu WYang CLipasti MLee H(2016)MIMD synchronization on SIMT architecturesThe 49th Annual IEEE/ACM International Symposium on Microarchitecture10.5555/3195638.3195652(1-14)Online publication date: 15-Oct-2016
https://dl.acm.org/doi/10.5555/3195638.3195652
ElTantawy AAamodt T(2016)MIMD synchronization on SIMT architectures2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO.2016.7783714(1-14)Online publication date: Oct-2016
https://doi.org/10.1109/MICRO.2016.7783714
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Chap - a SIMD graphics processor

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Chap - a SIMD graphics processor

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Published In

SIGGRAPH '84: Proceedings of the 11th annual conference on Computer graphics and interactive techniques

January 1984

264 pages

ISBN:0897911385

DOI:10.1145/800031

ACM SIGGRAPH Computer Graphics Volume 18, Issue 3
July 1984
264 pages
ISSN:0097-8930
DOI:10.1145/964965
Issue’s Table of Contents

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Published: 01 January 1984

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SIGGRAPH '84 Paper Acceptance Rate 41 of 118 submissions, 35%;

Overall Acceptance Rate 1,822 of 8,601 submissions, 21%

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Cited By

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Aamodt TFung WRogers T(2018)General-Purpose Graphics Processor ArchitecturesSynthesis Lectures on Computer Architecture10.2200/S00848ED1V01Y201804CAC04413:2(1-140)Online publication date: 21-May-2018
https://doi.org/10.2200/S00848ED1V01Y201804CAC044
ElTantawy AAamodt THsu WYang CLipasti MLee H(2016)MIMD synchronization on SIMT architecturesThe 49th Annual IEEE/ACM International Symposium on Microarchitecture10.5555/3195638.3195652(1-14)Online publication date: 15-Oct-2016
https://dl.acm.org/doi/10.5555/3195638.3195652
ElTantawy AAamodt T(2016)MIMD synchronization on SIMT architectures2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO.2016.7783714(1-14)Online publication date: Oct-2016
https://doi.org/10.1109/MICRO.2016.7783714
ElTantawy AMa JO'Connor MAamodt T(2014)A scalable multi-path microarchitecture for efficient GPU control flow2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2014.6835936(248-259)Online publication date: Feb-2014
https://doi.org/10.1109/HPCA.2014.6835936
Choi HSon DKim JKim C(2014)Concurrent warp executionThe Journal of Supercomputing10.1007/s11227-014-1155-469:1(330-356)Online publication date: 1-Jul-2014
https://dl.acm.org/doi/10.1007/s11227-014-1155-4
Bakhoda AKim JAamodt T(2013)Designing on-chip networks for throughput acceleratorsACM Transactions on Architecture and Code Optimization10.1145/251242910:3(1-35)Online publication date: 16-Sep-2013
https://dl.acm.org/doi/10.1145/2512429
Vaidya AShayesteh AWoo DSaharoy RAzimi MMendelson A(2013)SIMD divergence optimization through intra-warp compactionProceedings of the 40th Annual International Symposium on Computer Architecture10.1145/2485922.2485954(368-379)Online publication date: 23-Jun-2013
https://dl.acm.org/doi/10.1145/2485922.2485954
Huo XKrishnamoorthy SAgrawal GMalony ANemirovsky MMidkiff S(2013)Efficient scheduling of recursive control flow on GPUsProceedings of the 27th international ACM conference on International conference on supercomputing10.1145/2464996.2479870(409-420)Online publication date: 10-Jun-2013
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Dominguez RKaeli D(2013)Unstructured Control Flow in GPGPUProceedings of the 2013 IEEE 27th International Symposium on Parallel and Distributed Processing Workshops and PhD Forum10.1109/IPDPSW.2013.247(1194-1202)Online publication date: 20-May-2013
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Rhu MErez M(2013)The dual-path execution model for efficient GPU control flowProceedings of the 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2013.6522352(591-602)Online publication date: 23-Feb-2013
https://dl.acm.org/doi/10.1109/HPCA.2013.6522352
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Chap - a SIMD graphics processor

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