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On the generation of scan-based test sets with reachable states for testing under functional operation conditions

Published: 07 June 2004 Publication History

Abstract

Design-for-testability (DFT) for synchronous sequential circuits allows the generation and application of tests that rely on non-functional operation of the circuit. This can result in unnecessary yield loss due to the detection of faults that do not affect normal circuit operation. Considering single stuck-at faults in full-scan circuits, a test vector consists of a primary input vector U and a state S .We say that the test vector consisting of U and S relies on non-functional operation if S is an unreachable state, i.e., a state that cannot be reached from all the circuit states. Our goal is to obtain test sets with states S that are reachable states. Given a test set C, the solution we explore is based on a simulation-based procedure to identify reachable states that can replace unreachable states in C. No modifications are required to the test generation procedure and no sequential test generation is needed. Our results demonstrate that the proposed procedure is able to produce test sets that detect many of the circuit faults, which are detectable using scan, and practically all the sequentially irredundant faults, by using test vectors with reachable states. The procedure is applicable to any type of scan-based test set, including test sets for delay faults.

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  • (2023)Compact Set of Functional Broadside Tests with Fault Detection on Primary Outputs2023 IEEE 41st VLSI Test Symposium (VTS)10.1109/VTS56346.2023.10140078(1-7)Online publication date: 24-Apr-2023
  • (2023)Functionally Possible Scan-Based Test Set as a Dual of a Compressed Multicycle Test SetIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319390242:4(1336-1345)Online publication date: Apr-2023
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      cover image ACM Conferences
      DAC '04: Proceedings of the 41st annual Design Automation Conference
      June 2004
      1002 pages
      ISBN:1581138288
      DOI:10.1145/996566
      • General Chair:
      • Sharad Malik,
      • Program Chairs:
      • Limor Fix,
      • Andrew B. Kahng
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      Published: 07 June 2004

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      1. functional tests
      2. reachable states
      3. scan design

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      View all
      • (2023)Compact Set of Functional Broadside Tests with Fault Detection on Primary Outputs2023 IEEE 41st VLSI Test Symposium (VTS)10.1109/VTS56346.2023.10140078(1-7)Online publication date: 24-Apr-2023
      • (2023)Functionally Possible Scan-Based Test Set as a Dual of a Compressed Multicycle Test SetIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319390242:4(1336-1345)Online publication date: Apr-2023
      • (2022)Effective broadside tests using test cube seed generationRECENT TRENDS IN SCIENCE AND ENGINEERING10.1063/5.0074374(020118)Online publication date: 2022
      • (2021)Covering Test Holes of Functional Broadside TestsACM Transactions on Design Automation of Electronic Systems10.1145/344128226:3(1-15)Online publication date: 6-Jan-2021
      • (2021)Functional Constraints in the Selection of Two-Cycle Gate-Exhaustive Faults for Test GenerationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.308104629:7(1500-1504)Online publication date: Jul-2021
      • (2020)Globally Functional Transparent-Scan SequencesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.293933139:10(3012-3022)Online publication date: Oct-2020
      • (2020)Functional Broadside Tests Under Broadcast ScanIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.293932439:10(3139-3143)Online publication date: Oct-2020
      • (2019)Extracting a Close-to-Minimum Multicycle Functional Broadside Test Set From a Functional Test SequenceIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2019.2895386(1-10)Online publication date: 2019
      • (2019)Compaction of a Functional Broadside Test Set through the Compaction of a Functional Test Sequence without Sequential Fault Simulation2019 IEEE International Test Conference (ITC)10.1109/ITC44170.2019.9000161(1-7)Online publication date: Nov-2019
      • (2019)LFSR‐based generation of boundary‐functional broadside testsIET Computers & Digital Techniques10.1049/iet-cdt.2019.005814:2(61-68)Online publication date: 25-Sep-2019
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