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Hardware scheduling support in SMP architectures

Published: 16 April 2007 Publication History

Abstract

In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified by means of dedicated APIs and the HW-RTOS takes care of the communication requirements of the application and also implements the task scheduling algorithm. The HW-RTOS allows to have smaller footprints, since it avoids the need to link to the final executables traditional software RTOS libraries. Moreover, the HW-RTOS is able to exploit the easy task migration feature provided by an SMP architecture much more efficiently than a traditional software RTOS, due to its faster execution and we show how this significantly overcomes the performance achievable with optimal static task partitioning among two processors. Preliminary results show that the hardware overhead in a dual processor architecture is less than 20K gates.

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Cited By

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  • (2019)Efficient Fine-grained Processor-logic Interactions on the Cache-coherent Zynq PlatformACM Transactions on Reconfigurable Technology and Systems10.1145/327750611:4(1-22)Online publication date: 9-Jan-2019
  • (2010)Hardware-assisted security enhanced Linux in embedded systemsProceedings of the 5th Workshop on Embedded Systems Security10.1145/1873548.1873551(1-7)Online publication date: 24-Oct-2010
  • (2010)Using hardware support for scheduling with adaProceedings of the 15th Ada-Europe international conference on Reliable Software Technologies10.1007/978-3-642-13550-7_9(125-138)Online publication date: 14-Jun-2010

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Published In

cover image ACM Conferences
DATE '07: Proceedings of the conference on Design, automation and test in Europe
April 2007
1741 pages
ISBN:9783981080124

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EDA Consortium

San Jose, CA, United States

Publication History

Published: 16 April 2007

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DATE07
Sponsor:
  • EDAA
  • SIGDA
  • The Russian Academy of Sciences
DATE07: Design, Automation and Test in Europe
April 16 - 20, 2007
Nice, France

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

View all
  • (2019)Efficient Fine-grained Processor-logic Interactions on the Cache-coherent Zynq PlatformACM Transactions on Reconfigurable Technology and Systems10.1145/327750611:4(1-22)Online publication date: 9-Jan-2019
  • (2010)Hardware-assisted security enhanced Linux in embedded systemsProceedings of the 5th Workshop on Embedded Systems Security10.1145/1873548.1873551(1-7)Online publication date: 24-Oct-2010
  • (2010)Using hardware support for scheduling with adaProceedings of the 15th Ada-Europe international conference on Reliable Software Technologies10.1007/978-3-642-13550-7_9(125-138)Online publication date: 14-Jun-2010

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