Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
Skip header Section
Digital Signal Processing with Field Programmable Gate ArraysDecember 2007
Publisher:
  • Springer Publishing Company, Incorporated
ISBN:978-3-540-72612-8
Published:04 December 2007
Pages:
774
Skip Bibliometrics Section
Reflects downloads up to 16 Oct 2024Bibliometrics
Skip Abstract Section
Abstract

Field-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing as novel FPGA families are replacing ASICs and PDSPs for front-end digital signal processing algorithms. So the efficient implementation of these algorithms is critical and is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 40 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, advanced algorithms with high future potential, and adaptive filters. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Quartus II web edition" software. This edition has a new chapter on microprocessors, new sections on special functions using MAC calls, intellectual property core design and arbitrary sampling rate converters, and over 100 new exercises.

Cited By

  1. Avalos-Almazan G, Aguayo-Tapia S, De Jesus Rangel-Magdaleno J and Aviña-Corral V (2024). FPGA-Based Digital Taylor–Fourier Transform, IEEE Embedded Systems Letters, 16:3, (299-302), Online publication date: 1-Sep-2024.
  2. Wang Z and Ban T (2023). Design, Implementation, and Evaluation of Stochastic FIR Filters Based on FPGA, Circuits, Systems, and Signal Processing, 42:2, (1142-1162), Online publication date: 1-Feb-2023.
  3. Seshadri R, Ramakrishnan S and Kumar J (2022). Knowledge-based single-tone digital filter implementation for DSP systems, Personal and Ubiquitous Computing, 26:2, (319-328), Online publication date: 1-Apr-2022.
  4. Datta D and Dutta H (2021). High Efficient Polyphase Digital Down Converter on FPGA, Circuits, Systems, and Signal Processing, 40:11, (5787-5798), Online publication date: 1-Nov-2021.
  5. Gupta D, Gupta V, Chandra M and Verma G (2018). Real-Time Implementation of Parallel Architecture Based Noise Minimization from Speech Signals on FPGA, Wireless Personal Communications: An International Journal, 103:3, (1941-1963), Online publication date: 1-Dec-2018.
  6. ACM
    Leong P, Amano H, Anderson J, Bertels K, Cardoso J, Diessel O, Gogniat G, Hutton M, Lee J, Luk W, Lysaght P, Platzner M, Prasanna V, Rissa T, Silvano C, So H and Wang Y (2017). The First 25 Years of the FPL Conference, ACM Transactions on Reconfigurable Technology and Systems, 10:2, (1-17), Online publication date: 30-Jun-2017.
  7. Tsoeunyane L, Winberg S, Inggs M and Hübner M (2017). Software-Defined Radio FPGA Cores, International Journal of Reconfigurable Computing, 2017, Online publication date: 1-Jan-2017.
  8. Popovic V, Seyid K, Pignat E, Çogal Ö and Leblebici Y (2016). Multi-camera platform for panoramic real-time HDR video construction and rendering, Journal of Real-Time Image Processing, 12:4, (697-708), Online publication date: 1-Dec-2016.
  9. Poudereux P, Hernández Á, Mateos R, Pinto-Benel F and Cruz-Roldán F (2016). Design of a filter bank multi-carrier system for broadband power line communications, Signal Processing, 128:C, (57-67), Online publication date: 1-Nov-2016.
  10. Torun M, Yilmaz O and Akansu A (2016). FPGA, GPU, and CPU implementations of Jacobi algorithm for eigenanalysis, Journal of Parallel and Distributed Computing, 96:C, (172-180), Online publication date: 1-Oct-2016.
  11. ACM
    Sarika K and Veni S Hardware Implementation of Hough Transform for Circle Detection Proceedings of the 2014 International Conference on Interdisciplinary Advances in Applied Computing, (1-7)
  12. Bahoura M and Ezzaidi H (2011). FPGA-Implementation of Parallel and Sequential Architectures for Adaptive Noise Cancelation, Circuits, Systems, and Signal Processing, 30:6, (1521-1548), Online publication date: 1-Dec-2011.
  13. ACM
    Tsang C and So H (2011). Dynamic power reduction of FPGA-based reconfigurable computers using precomputation, ACM SIGARCH Computer Architecture News, 38:4, (87-92), Online publication date: 14-Sep-2010.
Contributors
  • Florida State University

Recommendations