The use of trace-driven simulation in the evaluation of computer memory systems has been popular for at least 30 years. Despite considerable progress in the development of this method, the best trace-driven simulators still run at least one to two orders of magnitude slower than actual hardware and it is unlikely that they will exhibit further substantial improvements in speed.
Trap-driven simulation is a new method for memory-system simulation that overcomes the bottlenecks inherent in trace-driven simulation speed. By invoking a memory-system simulator only on references that cause a change in the simulated memory state, trap-driven simulators can potentially reduce memory-system slowdowns to zero. Although promising in principle, little is known about how trap-driven simulation compares, in practice, to trace-driven simulation.
Through a literature survey of trace-driven simulation and the implementation of a prototype trap-driven simulator, Tapeworm II, this dissertation compares the trace-driven and trap-driven methods on the basis of their flexibility, portability, speed, and accuracy. We show that trap-driven simulation offers clear advantages over trace-driven simulation with respect to speed and accuracy. With some exceptions, trap-driven simulation is nearly as flexible as trace-driven simulation, but suffers from certain problems of portability. We suggest methods for alleviating these problems, through simulation-host hardware support in existing and future systems.
Cited By
- Reshadi M and Mishra P Memory access optimizations in instruction-set simulators Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, (237-242)
- Uhlig R, Nagle D, Mudge T, Sechrest S and Emer J Instruction fetching Proceedings of the 22nd annual international symposium on Computer architecture, (345-356)
- Uhlig R, Nagle D, Mudge T, Sechrest S and Emer J (1995). Instruction fetching, ACM SIGARCH Computer Architecture News, 23:2, (345-356), Online publication date: 1-May-1995.
Index Terms
- Trap-driven memory simulation
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Trap-driven simulation with Tapeworm II
ASPLOS VI: Proceedings of the sixth international conference on Architectural support for programming languages and operating systemsTapeworm II is a software-based simulation tool that evaluates the cache and TLB performance of multiple-task and operating system intensive workloads. Tapeworm resides in an OS kernel and causes a host machine's hardware to drive simulations with ...
Trap-driven simulation with Tapeworm II
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