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Algorithms for Synthesis and Testing of Asynchronous CircuitsJune 1993
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Abstract
From the Publisher:
The design of asynchronous circuits is increasingly important in solving problems such as complexity management, modularity, power consumption and clock distribution in large digital integrated circuits. Algorithms for Synthesis and Testing of Asynchronous Circuits describes a variety of mathematical models and algorithms that form the backbone and the body of a new design methodology for asynchronous design. The book is intended for asynchronous hardware designers, for computer-aided tool experts, and for digital designers interested in exploring the possibility of designing asynchronous circuits. It requires a solid mathematical background in discrete event systems and algorithms. While the book has not been written as a textbook, nevertheless it could be used as a reference book in an advanced course in logic synthesis or asynchronous design. Algorithms for Synthesis and Testing of Asynchronous Circuits also includes an extensive literature review. The review summarizes and compares classical papers from the 1960s with the most recent developments in the areas of asynchronous circuit design testing and verification.
Cited By
- Yakovlev A, Koelmans A and Lavagno L (1995). High-Level Modeling and Design of Asynchronous Interface Logic, IEEE Design & Test, 12:1, (32-40), Online publication date: 1-Jan-2010.
- Ruan J, Wang Z, Dai K and Li Y Design and test of self-checking asynchronous control circuit Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation, (320-329)
Amde M, Blunno I and Sotiriou C Automating the design of an asynchronous DLX microprocessor Proceedings of the 40th annual Design Automation Conference, (502-507)- Lavagno L and Nowick S Asynchronous control circuits Logic Synthesis and Verification, (255-284)
- Cortadella J, Kishinevsky M, Kondratyev A, Lavagno L and Yakovlev A Hardware and Petri nets Proceedings of the 21st international conference on Application and theory of petri nets, (1-15)
- Brunvand E, Nowick S and Yun K Practical advances in asynchronous design and in asynchronous/synchronous interfaces Proceedings of the 36th annual ACM/IEEE Design Automation Conference, (104-109)
- Saito H, Kondratyev A, Cortadella J, Lavagno L and Yakovlev A What is the cost of delay insensitivity? Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, (316-323)
- Taubin A, Kondratyev A, Cortadella J and Lavagno L Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
- Beister J, Eckstein G and Wollowski R From STG to Extended-Burst-Mode Machines Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
- Kondratyev A, Kishinevsky M, Taubin A and Ten S (2019). Analysis of Petri Nets by Ordering Relations in Reduced Unfoldings, Formal Methods in System Design, 12:1, (5-38), Online publication date: 1-Jan-1998.
- Cortadella J, Kishinevsky M, Lavagno L and Yakovlev A (1998). Deriving Petri Nets from Finite Transition Systems, IEEE Transactions on Computers, 47:8, (859-882), Online publication date: 1-Aug-1998.
- Cortadella J, Kishinevsky M, Kondratyev A, Lavagno L, Taubin A and Yakovlev A Lazy transition systems Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, (324-331)
- Kishinevsky M, Cortadella J and Kondratyev A Asynchronous interface specification, analysis and synthesis Proceedings of the 35th annual Design Automation Conference, (2-7)
- Cortadella J, Kishinevsky M, Kondratyev A, Lavagno L, Pastor E and Yakovlev A Decomposition and technology mapping of speed-independent circuits using Boolean relations Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, (220-227)
- Kishinevsky M, Kondratyev A, Lavagno L, Saldanha A and Taubin A Partial scan delay fault testing of asynchronous circuits Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, (728-735)
- Guyot A, Renaudin M, El Hassan B and Levering V Self timed division and square-root extraction Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
- Boutamine H, Guyot A, Elhassan B and Renaudin M Asynchronous SRT Dividers Proceedings of the 1996 European conference on Design and Test
- Linder D and Harden J (1996). Phased Logic, IEEE Transactions on Computers, 45:9, (1031-1044), Online publication date: 1-Sep-1996.
- Cortadella J, Kishinevsky M, Kondratyev A, Lavagno L and Yakovlev A Complete State Encoding Based on the Theory of Regions Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
- Pena M and Cortadella J Combining Process Algebras and Petri Nets for the Specification and Synthesis of Asynchronous Circuits Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
- Bush M and Josephs M Some Limitations to Speed-Independence in Asynchronous Circuits Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
- Vanbekbergen P, Wang A and Keutzer K A design and validation system for asynchronous circuits Proceedings of the 32nd annual ACM/IEEE Design Automation Conference, (725-730)
- Kondratyev A, Cortadella J, Kishinevsky M, Pastor E, Roig O and Yakovlev A Checking signal transition graph implementability by symbolic BDD traversal Proceedings of the 1995 European conference on Design and Test
- Nielsen C and Kishinevsky M Performance analysis based on timing simulation Proceedings of the 31st annual Design Automation Conference, (70-76)
- Yun K, Lin B, Dill D and Devadas S Performance-driven synthesis of asynchronous controllers Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, (550-557)
- Siegel P and De Micheli G Decomposition methods for library binding of speed-independent asynchronous designs Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, (558-565)
- Lenk S Extended timing diagrams as a specification language Proceedings of the conference on European design automation, (28-33)
- Eveking H (V)HDL-based verification of heterogeneous synchronous/asynchronous systems Proceedings of the conference on European design automation, (566-571)
- Marshall A, Siegel P and Coates B (1994). Designing an Asynchronous Communications Chip, IEEE Design & Test, 11:2, (8-21), Online publication date: 1-Apr-1994.
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