Design and test of self-checking asynchronous control circuit
Abstract
References
Recommendations
A State Assignment Approach to Asynchronous CMOS Circuit Design
Present a new algorithm for state assignment in asynchronous circuits so that for each circuit state transition, only one (secondary) state variable switches. No intermediate unstable states are used. The resultant circuits operate at optimum speed in ...
Design for Test of Asynchronous NULL Convention Logic (NCL) Circuits
Due to the absence of a global clock and the presence of more state holding elements that synchronize the control and data paths, conventional Automatic Test Pattern Generation (ATPG) algorithms fail when applied to asynchronous circuits, leading to ...
Integration of asynchronous and self-checking multiple-valued current-mode circuits based on dual-rail differential logic
PRDC '00: Proceedings of the 2000 Pacific Rim International Symposium on Dependable ComputingA new multiple-valued current-mode (MVCM) integrated circuit based on dual-rail differential logic, whose current-driving capability is high at a low supply voltage, is proposed to realize a totally self-checking circuit and an asynchronous-control ...
Comments
Information & Contributors
Information
Published In
Sponsors
- ERICSSON
- Chalmers University of Technology
- City of Göteborg: City of Göteborg
- Omnisys: Omnisys
Publisher
Springer-Verlag
Berlin, Heidelberg
Publication History
Qualifiers
- Article
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0