Article

Analysis and Applications of the XDI model

Authors:

Willem C. Mallon,

Jan Tijmen Udding,

Tom VerhoeffAuthors Info & Claims

ASYNC '99: Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems

Page 231

Published: 19 April 1999 Publication History

Abstract

It is not always straightforward to implement a network that is robust enough to be functionally independent of communication delay. In order to specify and verify so called Delay Insensitive networks, numerous models and formalisms have been developed. In this paper we analyze one of the most expressive models. We show how based on rewrite rules we can compute, rather than invent parts of a network. We implemented these computations in a tool. We also show how healthiness, finite execution models and a distributive parallel composition cannot coexist.

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Cited By

Kapoor HJosephs MFurey D(2006)Verification and Implementation of Delay-Insensitive Processes in Restrictive EnvironmentsFundamenta Informaticae10.5555/2367636.236763970:1,2(21-48)Online publication date: 1-Apr-2006
https://dl.acm.org/doi/10.5555/2367636.2367639
Kapoor HJosephs MFurey D(2005)Verification and implementation of delay-insensitive processes in restrictive environmentsFundamenta Informaticae10.5555/1151660.115166370:1(21-48)Online publication date: 1-Oct-2005
https://dl.acm.org/doi/10.5555/1151660.1151663
Yevtushenko NVilla TBrayton RPetrenko ASangiovanni-Vincentelli AErnst R(2001)Solution of parallel language equations for logic synthesisProceedings of the 2001 IEEE/ACM international conference on Computer-aided design10.5555/603095.603116(103-110)Online publication date: 4-Nov-2001
https://dl.acm.org/doi/10.5555/603095.603116

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Published In

cover image Guide Proceedings

ASYNC '99: Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems

April 1999

ISBN:0769500315

Copyright © Copyright (c) 1998 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.

Publisher

IEEE Computer Society

United States

Publication History

Published: 19 April 1999

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Cited By

Kapoor HJosephs MFurey D(2006)Verification and Implementation of Delay-Insensitive Processes in Restrictive EnvironmentsFundamenta Informaticae10.5555/2367636.236763970:1,2(21-48)Online publication date: 1-Apr-2006
https://dl.acm.org/doi/10.5555/2367636.2367639
Kapoor HJosephs MFurey D(2005)Verification and implementation of delay-insensitive processes in restrictive environmentsFundamenta Informaticae10.5555/1151660.115166370:1(21-48)Online publication date: 1-Oct-2005
https://dl.acm.org/doi/10.5555/1151660.1151663
Yevtushenko NVilla TBrayton RPetrenko ASangiovanni-Vincentelli AErnst R(2001)Solution of parallel language equations for logic synthesisProceedings of the 2001 IEEE/ACM international conference on Computer-aided design10.5555/603095.603116(103-110)Online publication date: 4-Nov-2001
https://dl.acm.org/doi/10.5555/603095.603116

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