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- Wang ZHe XSechen C(2015)A New Approach for Gate-Level Delay-Insensitive Asynchronous LogicCircuits, Systems, and Signal Processing10.5555/2765121.276513734:5(1431-1459)Online publication date: 1-May-2015
- Wang ZHe XSechen CChang Y(2014)TonyChopperProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691457(446-453)Online publication date: 3-Nov-2014
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