Article

Optimal Code and Data Layout in Embedded Systems

Authors:

T. S. Rajesh Kumar,

R. Govindarajan,

C. P. Ravi KumarAuthors Info & Claims

VLSID '03: Proceedings of the 16th International Conference on VLSI Design

Page 573

Published: 04 January 2003 Publication History

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Abstract

Efficient layout of code and data sections in varioustypes/levels of memory in an embedded systemsis very critical not only for achieving real-time perormance, but also for reducing its cost and powerconsumption. In this paper we formulate the optimalcode and data section layout problem as an integerlinear programming (ILP problem. The proposedormulation can handle: (i) on-chip and off-chipmemory, (ii) multiple on-chip memory banks, (iii) singleand dual ported on-chip RAMs, (iv) overlay ofdata sections, and (v) swapping of code and data(from/to external memory). Our experiments demonstratethat, or a moderately complex embedded system,the optimal results produced by our formulationtook only a ew minutes on a PC, and it matches, interms of performance and on-chip memory size, with ahand-optimized code/data layout which took 1 man-month.

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Cited By

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Kumar TGovindarajan RRavikumar C(2012)On-chip memory architecture exploration framework for DSP processor-based embedded system on chipACM Transactions on Embedded Computing Systems10.1145/2146417.214642211:1(1-25)Online publication date: 5-Apr-2012
https://dl.acm.org/doi/10.1145/2146417.2146422
Mankin JKaeli DArdini J(2009)Software transactional memory for multicore embedded systemsACM SIGPLAN Notices10.1145/1543136.154246544:7(90-98)Online publication date: 19-Jun-2009
https://dl.acm.org/doi/10.1145/1543136.1542465
Mankin JKaeli DArdini JKirsch CKandemir M(2009)Software transactional memory for multicore embedded systemsProceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems10.1145/1542452.1542465(90-98)Online publication date: 19-Jun-2009
https://dl.acm.org/doi/10.1145/1542452.1542465

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Optimal Code and Data Layout in Embedded Systems

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VLSID '03: Proceedings of the 16th International Conference on VLSI Design

January 2003

ISBN:0769518680

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IEEE Computer Society

United States

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Published: 04 January 2003

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Kumar TGovindarajan RRavikumar C(2012)On-chip memory architecture exploration framework for DSP processor-based embedded system on chipACM Transactions on Embedded Computing Systems10.1145/2146417.214642211:1(1-25)Online publication date: 5-Apr-2012
https://dl.acm.org/doi/10.1145/2146417.2146422
Mankin JKaeli DArdini J(2009)Software transactional memory for multicore embedded systemsACM SIGPLAN Notices10.1145/1543136.154246544:7(90-98)Online publication date: 19-Jun-2009
https://dl.acm.org/doi/10.1145/1543136.1542465
Mankin JKaeli DArdini JKirsch CKandemir M(2009)Software transactional memory for multicore embedded systemsProceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems10.1145/1542452.1542465(90-98)Online publication date: 19-Jun-2009
https://dl.acm.org/doi/10.1145/1542452.1542465

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Cited By

Index Terms

Recommendations

Minimizing Energy Consumption of Embedded Systems via Optimal Code Layout

Optimizing Data Layout for Racetrack Memory in Embedded Systems

Write-activity-aware nand flash memory management for pcm-based embedded systems

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