Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.5555/367072.367849acmconferencesArticle/Chapter ViewAbstractPublication PagesdateConference Proceedingsconference-collections
Article

Cache conscious data layout organization for embedded multimedia applications

Published: 13 March 2001 Publication History
  • Get Citation Alerts
  • First page of PDF

    References

    [1]
    P.Baglietto, M.Maresca and M.Migliardi, "Image processing on highperformance RISC systems", Proc. of the IEEE, vol. 84, no. 7, pp.917- 929, july 1996.
    [2]
    V.Bhaskaran and K. Konstantinides, "Image and Video Compression Standards : Algorithms and Architectures", Kluwer Acad. Publ., Boston, 1995.
    [3]
    P.Clauss, B.Meister, "Automatic memory layout transformation to optimize spatial locality in parametrized loop nests", 4th Annual Workshop on Interaction between Compilers and Comp. Arch. (INTERACT- 4), Toulouse, France, Jan 2000.
    [4]
    J.Covino, J.Connor, D.Evans, A.Roberts, M.Robillard, J.Sousa, L.Ternullo, "A 2ns zero wait state, 32KB semi-associative L1 cache", IEEE Intl Solid State Circuits Conference (ISSCC-96), pp. 154-155, 1996.
    [5]
    E.De Greef, "Storage size reduction for multimedia applications", Doctoral Dissertation, Dept. of EE, K.U.Leuven, January 1998.
    [6]
    F.Catthoor, S.Wuytack, E.De Greef, F.Balasa, L.Nachtergaele, A.Vandecappelle, "Custom Memory Management Methodology - Exploration of Memory Organization for Embedded Multimedia System Design", ISBN 0-7923-8288-9, Kluwer Acad. Publ., Boston, 1998.
    [7]
    C.Ghez, M.Miranda, A.Vandecappelle, F.Catthoor, D.Verkest, "Systematic high-level address code transformations for piece-wise linear indexing: illustration on a medical imaging algorithm", Proc. IEEE Wsh. on Signal Processing Systems (SIPS), Lafayette LA, IEEE Press, Oct. 2000.
    [8]
    S.Ghosh, M.Martonosi, S.Malik, "Cache Miss Equations : A Compiler Framework for Analyzing and Tuning Memory Behaviour", ACM transactions on Programming Languages and Systems, vol. 21, No. 4, pp. 702-746, July 1999.
    [9]
    N.Jouppi, et al., "A 300-MHz 115-W 32-b bipolar ECL microprocessor", In IEEE Journal of solid-state circuits, pp. 1152-1165, Nov 1993.
    [10]
    M.Kandemir, J.Ramanujam, A.Choudhary, "Improving cache locality by a combination of loop and data transformations", IEEE trans. on computers, vol. 48, no. 2, pp. 159-167, 1999.
    [11]
    C.Kulkarni, F.Catthoor, H.De Man, "Advanced data layout optimization for multimedia applications", Lecture notes in computer science (PDIVM/IPDPS 2000), vol. 1800, pp. 186-193, May 2000.
    [12]
    C.Kulkarni, F.Catthoor, H.De Man, "Cache optimization for multimedia applications", Doctoral Dissertation, Dept. of EE, K.U.Leuven, February 2001.
    [13]
    C.Kulkarni, F.Catthoor, H.De Man, "Code transformations for low power caching in embedded multimedia processors,", Intnl. Parallel Proc. Symp.(IPPS/SPDP), Orlando FL, pp.292-297,April 1998.
    [14]
    D.Kulkarni, M.Stumm, "Linear loop transformations in optimizing compilers for parallel machines", The Australian computer journal, pp.41-50, may 1995.
    [15]
    M.Lam, E.Rothberg, M.Wolf, "The cache performance and optimizations of blocked algorithms", In Proc. 6th Intnl. Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-IV), pp.63-74, Santa Clara, Ca., 1991.
    [16]
    N.Manjikian and T.Abdelrahman, "Array data layout for reduction of cache conflicts", Intl. Conference on Parallel and Distributed Computing Systems, 1995.
    [17]
    G.L.Nemhauser, L.A.Wolsey, "Integer and Combinatorial Optimization", J.Wiley&Sons, New York, N.Y., 1988.
    [18]
    P.R.Panda, N.Dutt, A.Nicolau, "Memory issues in embedded systems-onchip", Kluwer Academic Publishers, Boston, MA, 1999.
    [19]
    D.A.Patterson, J.L.Hennessy, "Computer architecture: A quantitative approach", Morgan Kaufmann Publishers Inc., San Francisco,1996.
    [20]
    G.Rivera, C.Tseng, "Compiler optimizations for eliminating cache conflict misses", Technical Report CS-TR-3819, Dept of Computer Science, University of Maryland, July 1997.
    [21]
    D.Burger, T.Austin, "The Simplescalar Toolset", Version 2.0, online document available at http://ww.cs.wisc.edu/ mscalar/simplescalar.html.

    Cited By

    View all
    • (2010)Embedded memory binding in FPGAsProceedings of the 47th Design Automation Conference10.1145/1837274.1837389(457-462)Online publication date: 13-Jun-2010
    • (2010)Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirementsACM Transactions on Embedded Computing Systems10.1145/1698772.16987759:3(1-26)Online publication date: 5-Mar-2010
    • (2009)Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution EnvironmentsJournal of Signal Processing Systems10.1007/s11265-008-0223-556:2-3(125-139)Online publication date: 1-Sep-2009
    • Show More Cited By

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    DATE '01: Proceedings of the conference on Design, automation and test in Europe
    March 2001
    756 pages
    ISBN:0769509932

    Sponsors

    • EDAA: European Design Automation Association
    • IFIP WG 10.5: IFIP WG 10.5
    • ECSI
    • EDAC: Electronic Design Automation Consortium
    • SIGDA: ACM Special Interest Group on Design Automation
    • IEEE-CS\TTTC: Test Technology Technical Council
    • IEEE-CS\DATC: IEEE Computer Society
    • The Russian Academy of Sciences: The Russian Academy of Sciences

    Publisher

    IEEE Press

    Publication History

    Published: 13 March 2001

    Check for updates

    Qualifiers

    • Article

    Conference

    DATE01
    Sponsor:
    • EDAA
    • IFIP WG 10.5
    • EDAC
    • SIGDA
    • IEEE-CS\TTTC
    • IEEE-CS\DATC
    • The Russian Academy of Sciences

    Acceptance Rates

    Overall Acceptance Rate 518 of 1,794 submissions, 29%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)0
    • Downloads (Last 6 weeks)0
    Reflects downloads up to 28 Jul 2024

    Other Metrics

    Citations

    Cited By

    View all
    • (2010)Embedded memory binding in FPGAsProceedings of the 47th Design Automation Conference10.1145/1837274.1837389(457-462)Online publication date: 13-Jun-2010
    • (2010)Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirementsACM Transactions on Embedded Computing Systems10.1145/1698772.16987759:3(1-26)Online publication date: 5-Mar-2010
    • (2009)Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution EnvironmentsJournal of Signal Processing Systems10.1007/s11265-008-0223-556:2-3(125-139)Online publication date: 1-Sep-2009
    • (2008)Holistic design and caching in mobile computingProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450161(115-120)Online publication date: 19-Oct-2008
    • (2007)Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memoryProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266597(1072-1077)Online publication date: 16-Apr-2007
    • (2007)DRDUACM Transactions on Design Automation of Electronic Systems10.1145/1230800.123080712:2(15-es)Online publication date: 1-Apr-2007
    • (2005)SoftexplorerEURASIP Journal on Advances in Signal Processing10.1155/ASP.2005.26412005(2641-2654)Online publication date: 1-Jan-2005
    • (2004)Data Reuse Analysis Technique for Software-Controlled Memory HierarchiesProceedings of the conference on Design, automation and test in Europe - Volume 110.5555/968878.968995Online publication date: 16-Feb-2004
    • (2004)Context-independent codes for off-chip interconnectsProceedings of the 4th international conference on Power-Aware Computer Systems10.1007/11574859_8(107-119)Online publication date: 5-Dec-2004
    • (2003)Optimal Code and Data Layout in Embedded SystemsProceedings of the 16th International Conference on VLSI Design10.5555/832285.835604Online publication date: 4-Jan-2003
    • Show More Cited By

    View Options

    Get Access

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media