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Automatic generation and targeting of application specific operating systems and embedded systems software

Published: 13 March 2001 Publication History
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    References

    [1]
    Synthetix project. available at http://www.cse.ogi.edu/DISC/projects/synthetix/.
    [2]
    J. Cortadella and al. Task Generation and Compile-Time Scheduling for Mixed Data-control Embedded Software. Proc. Design Automation Conf., pages 489-494, June 2000.
    [3]
    D. Desmet, D. Verkest, and H. D. Man. Operating System based Software Generation for Systems-on-Chip. Proc. Design Automation Conf., pages 396-401, June 2000.
    [4]
    R. Dick, G. Lakshiminarayana, A. Raghunathan, and N. Jha. Power Analysis of Embedded Operating Systems, pp.312- 315. Proc. Design Automation Conf., June 2000.
    [5]
    S. Edwards. Compiling Esterel into Sequential Code. Proc. Design Automation Conf., pages 322-327, June 2000.
    [6]
    Eonic Systems, Inc. Virtuoso v.4.1. available at http://www.eonic.com/.
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    T. Grandpierre. Optimized Rapid Prototyping for Real-Time Embedded Heterogeneous Multiprocessor. CODES Workshop on Hardware/Software Codesign, May 1999.
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    A. ~sterling, T. Benner, and R. Ernst. Code Generation and Context Switching for Static Scheduling of Mixed Control and Data Oriented HW/SW Systems. Proc. 4th Asia- Pacific Conference on Hardware Description Language, pages 131-135, Aug. 1997.
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    B. Shackleford, M. Tasuda, E. Okushi, H. Koizumi, H. Tomiyama, and H. Yasuura. Memory-CPU Size Optimization for Embedded System Designs. Proc. Design Automation Conf., pages 246-251, June 1997.
    [10]
    F. Thoen and F. Catthoor. Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems. Kluwer Academic Publishers, Boston, 2000.
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    S. Vercauteren, B. Lin, and H. D. Man. A Strategy for Real-Time Kernel Support in Application-Specific HW/SW Embedded Architectures. Proc. Design Automation Conf., pages 678-683, 1996.
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    Wind River Systems, Inc. VxWorks 5.4. available at http://www.wrs.com/products/html/vxwks54.html.

    Cited By

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    • (2009)Hardware-dependent software synthesis for many-core embedded systemsProceedings of the 2009 Asia and South Pacific Design Automation Conference10.5555/1509633.1509714(304-310)Online publication date: 19-Jan-2009
    • (2009)On the exploitation of loop-level parallelism in embedded applicationsACM Transactions on Embedded Computing Systems10.1145/1457255.14572578:2(1-34)Online publication date: 9-Feb-2009
    • (2009)Dynamically reconfigurable hardware-software architecture for partitioning networking functions on the SoC platformJournal of Systems and Software10.1016/j.jss.2009.03.01582:10(1588-1599)Online publication date: 1-Oct-2009
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    Published In

    cover image ACM Conferences
    DATE '01: Proceedings of the conference on Design, automation and test in Europe
    March 2001
    756 pages
    ISBN:0769509932

    Sponsors

    • EDAA: European Design Automation Association
    • IFIP WG 10.5: IFIP WG 10.5
    • ECSI
    • EDAC: Electronic Design Automation Consortium
    • SIGDA: ACM Special Interest Group on Design Automation
    • IEEE-CS\TTTC: Test Technology Technical Council
    • IEEE-CS\DATC: IEEE Computer Society
    • The Russian Academy of Sciences: The Russian Academy of Sciences

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    IEEE Press

    Publication History

    Published: 13 March 2001

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    Sponsor:
    • EDAA
    • IFIP WG 10.5
    • EDAC
    • SIGDA
    • IEEE-CS\TTTC
    • IEEE-CS\DATC
    • The Russian Academy of Sciences

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    Overall Acceptance Rate 518 of 1,794 submissions, 29%

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    Cited By

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    • (2009)Hardware-dependent software synthesis for many-core embedded systemsProceedings of the 2009 Asia and South Pacific Design Automation Conference10.5555/1509633.1509714(304-310)Online publication date: 19-Jan-2009
    • (2009)On the exploitation of loop-level parallelism in embedded applicationsACM Transactions on Embedded Computing Systems10.1145/1457255.14572578:2(1-34)Online publication date: 9-Feb-2009
    • (2009)Dynamically reconfigurable hardware-software architecture for partitioning networking functions on the SoC platformJournal of Systems and Software10.1016/j.jss.2009.03.01582:10(1588-1599)Online publication date: 1-Oct-2009
    • (2005)Service dependency graphProceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1084834.1084900(261-266)Online publication date: 19-Sep-2005
    • (2004)Power and performance tuning in the synthesis of real-time scheduling algorithms for embedded applicationsProceedings of the 17th symposium on Integrated circuits and system design10.1145/1016568.1016616(169-174)Online publication date: 4-Sep-2004
    • (2004)Strategies for the integration of hardware and software IP components in embedded systems-on-chipIntegration, the VLSI Journal10.1016/j.vlsi.2003.12.00537:4(223-252)Online publication date: 1-Sep-2004
    • (2003)RTOS scheduling in transaction level modelsProceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/944645.944653(31-36)Online publication date: 1-Oct-2003
    • (2003)Combining architecture exploration and a path to implementation to build a complete SoC design flow from system specification to RTLProceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119816(219-224)Online publication date: 21-Jan-2003
    • (2002)Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC DesignProceedings of the conference on Design, automation and test in Europe10.5555/882452.874380Online publication date: 4-Mar-2002
    • (2001)ColifProceedings of the 12th International Workshop on Rapid System Prototyping10.5555/882480.883749Online publication date: 25-Jun-2001
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