Article

Combining architecture exploration and a path to implementation to build a complete SoC design flow from system specification to RTL

Authors:

M. Anouar Dziri,

Flavio Rech Wagner,

Wander O. Cesário,

Ahmed A. JerrayaAuthors Info & Claims

ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference

Pages 219 - 224

https://doi.org/10.1145/1119772.1119816

Published: 21 January 2003 Publication History

Abstract

This paper presents a full System-on-Chip (SoC) design flow from system specification to RT-level. A new approach to obtain a full path to implementation for SoC design is proposed. This approach combines architecture design space exploration using the VCC design environment and system synthesis using the ROSES design flow, allowing a true and complete system level design flow. The experiment with a VDSL application shows a significant reduction of design time.

References

[1]

A. D. Pimentel, et al. "Exploring embedded-systems architectures with Artemis," IEEE Computer, Vol. 34, pp. 57--63, 2001.

Digital Library

[2]

Cadence, http.//www.cadence.com/products/vcc.html

[3]

"Cadence Virtual Component Co-design Modeling guide,"

[4]

"Cadence Virtual Component Co-design Architecture Evaluation Guide,"

[5]

"Cadence Virtual Component Co-design Link to Implementation," Cadence Design Systems, Inc., March 2001.

[6]

CoWare N2C, http://www.coware.com

[7]

D. J. G. Mestdagh, M. R. Isaksson, P. Odling, "zipper VDSL: a solution for robust duplex communication over telephone lines," IEEE Communication magazine, pp. 90--96, May 2000.

Digital Library

[8]

D. Lyonnard, S. Yoo, A. Baghdadi, A. A. Jerraya, "Automatic generation of application specific architectures for heterogeneous multiprocessor system-on-chip," Proceedings DAC 2001, June 2001, Las Vegas, USA.

Digital Library

[9]

I. Bolsens, et al. "Hardware/software co-design of digital telecommunication systems," Proceedings of IEEE, Vol. 85, No. 3, pp. 391--418, 1997.

[10]

J-Y. Brunel et al., "COSY communication IP's," DAC 2000, Los Angeles, California, USA.

Digital Library

[11]

J. Gerlach, W. Rosenstiel, "System Level Design Using the SystemC Modeling Platform," In: R. Merker, W. Schwarz (Eds.), "System Design Automation -Fundamentals, Principles, Methods, Examples", VDI Verlag Düsseldorf, 2000.

[12]

L. Gauthier, S. Yoo, A. A. Jerraya, "Automatic generation and targeting of application specific operating systems and embedded systems software," 5th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2001), St. Goar, Germany, March 2001.

Digital Library

[13]

L. Gauthier, S. Yoo, AA. Jerraya, "Application specific operating systems generation and targeting for embedded SoCs," the 10th Workshop on Synthesis and System Integration of MIxed Technologies(SASIMI'01), October2001.

[14]

M. D. Nava, G. S. Okvist, "The zipper prototype: a complete and flexible VDSL multi-carrier solution," ST Journal special issue xDSL, September 2001.

[15]

M. Fujita, H. Nakamura, "The standard SpecC language," ISSS '01, October 2001, Montréal, Québec, Canada.

Digital Library

[16]

R. Ernst, J. Henkel, Th. Benner, "Hardware software cosynthesis for microcontrollers," IEEE Design and Test of computers, December 1993.

Digital Library

[17]

R. K. Gupta, "Co-synthesis of hardware and software for digital embedded systems," PhD Thesis, standford, December 1993.

Digital Library

[18]

S. Vercauteren, B. Lin, H. De Man, "Constructing application-specific heterogeneous embedded architectures from custom HW/SW applications," 33rd DAC 1996, June 1996, Las Vegas, USA.

Digital Library

[19]

SystemC, http://www.systemc.org

[20]

T. Kuhn, et al. "A framework for object oriented hardware specification, verification, and synthesis," DAC 2001, June 2001, Las Vegas, USA.

Digital Library

[21]

W. Cesàrio, et al. "Component-based design approach for multicore SoCs," Proceedings DAC 2002, June 2002, New Orleans, USA.

Digital Library

[22]

W. Cesàrio, et al. "HW/SW interfaces design of a VDSL modem using automatic refinement of a virtual architecture specification into a multiprocessor SoC: a case study," Proceedings DATE 2002, March 2002, Paris, France.

Cited By

Wu QBian JXue HTang T(2005)System-level architectural exploration using allocation-on-demand techniqueProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1121047(1296-1298)Online publication date: 18-Jan-2005
https://dl.acm.org/doi/10.1145/1120725.1121047
Kangas TRiihimäki JSalminen ELahtinen VOrsila HKuusilinna KHämäläinen T(2004)A Communication-Centric Design Flow for HIBI-Based SoCsComputer Systems: Architectures, Modeling, and Simulation10.1007/978-3-540-27776-7_49(474-483)Online publication date: 2004
https://doi.org/10.1007/978-3-540-27776-7_49

Recommendations

Supporting RTL flow compatibility in a microarchitecture-level design framework
CODES+ISSS '09: Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis

Current RTL-based design methodologies face significant scaling challenges related to the difficulty of designing, modifying, and verifying RTL. RTL contains primarily low level structural information about the design. In contrast, the microarchitecture-...
Synthesis for SoC architecture using VCores
ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference

In this paper, we propose a novel architecture synthesis method for SoC using VCores. VCores are reusable and configurable high-level descriptions. An initial SoC architecture, which consists of a CPU, buses, and peripherals, is generated based on an ...
Design and implementation of Performance Analysis Unit (PAU) for AXI-based multi-core System on Chip (SOC)

With the rapid development of semiconductor technology, more complicated systems have been integrated into single chips. However, system performance is not increased in proportion to the gate-count of the system. This is mainly because the optimized ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

ASP-DAC '03: Proceedings of the 2003 Asia and South Pacific Design Automation Conference

January 2003

865 pages

ISBN:0780376609

DOI:10.1145/1119772

General Chair:
Hiroto Yasuura

Copyright © 2003 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

IPSJ: Information Processing Society of Japan
IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE: Institute of Electronics, Information and Communication Engineers

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 21 January 2003

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Article

Acceptance Rates

Overall Acceptance Rate 466 of 1,454 submissions, 32%

Upcoming Conference

ASPDAC '25

Sponsor:
sigda

30th Asia and South Pacific Design Automation Conference

January 20 - 23, 2025

Tokyo , Japan

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

2
Total Citations
View Citations
151
Total Downloads

Downloads (Last 12 months)1
Downloads (Last 6 weeks)0

Reflects downloads up to 28 Jul 2024

Other Metrics

View Author Metrics

Citations

Cited By

Wu QBian JXue HTang T(2005)System-level architectural exploration using allocation-on-demand techniqueProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1121047(1296-1298)Online publication date: 18-Jan-2005
https://dl.acm.org/doi/10.1145/1120725.1121047
Kangas TRiihimäki JSalminen ELahtinen VOrsila HKuusilinna KHämäläinen T(2004)A Communication-Centric Design Flow for HIBI-Based SoCsComputer Systems: Architectures, Modeling, and Simulation10.1007/978-3-540-27776-7_49(474-483)Online publication date: 2004
https://doi.org/10.1007/978-3-540-27776-7_49

View Options

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Table of Contents