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Embedded memory binding in FPGAs

Published: 13 June 2010 Publication History
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  • Abstract

    Embedded memory blocks have been integrated infield-programmable gate-arrays (FPGAs) for over a decade. Their count, as well as their capacity and the number of configurations, has increased over time. This growth poses unique challenges to binding the large number of embedded memory blocks to the data vectors that exist in the applications mapped onto FPGAs. In this paper we discuss how this challenge can be addressed algorithmically.

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    cover image ACM Conferences
    DAC '10: Proceedings of the 47th Design Automation Conference
    June 2010
    1036 pages
    ISBN:9781450300025
    DOI:10.1145/1837274
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    New York, NY, United States

    Publication History

    Published: 13 June 2010

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    Author Tags

    1. FPGA
    2. binding
    3. memory

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