Article

Reducing Test Application Time Through Test Data Mutation Encoding

Authors:

S. Reda,

A. OrailogluAuthors Info & Claims

DATE '02: Proceedings of the conference on Design, automation and test in Europe

Page 387

Published: 04 March 2002 Publication History

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Abstract

In this paper we propose a new compression algorithmgeared to reduce the time needed to test scan-based designs.Our scheme ompresses the test vector set by encoding thebits that need to be flipped in the current test data slice inorder to obtain the mutated subsequent test data slice. Exploitation of the overlap in the encoded data by effectivetraversal search algorithms results in drastic overall compression.The technique we propose an be utilized as notonly a stand-alone technique but also an be utilized ontest data already compressed,extracting even further compression.The performance of the algorithm is mathematically analyzed and its merits experimentally confirmed onthe larger examples of the ISCAS '89 benchmark ircuits.

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Tenentes VKavousianos XPhillips JHu AGraeb H(2011)Test-data volume and scan-power reduction with low ATE interface for multi-core SoCsProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132489(747-754)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132489
Li JLiu XZhang YHu YLi XXu Q(2011)Capture-power-aware test data compression using selective encodingIntegration, the VLSI Journal10.1016/j.vlsi.2011.01.00544:3(205-216)Online publication date: 1-Jun-2011
https://dl.acm.org/doi/10.1016/j.vlsi.2011.01.005
Basu KMishra P(2010)Test data compression using efficient bitmask and dictionary selection methodsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.202411618:9(1277-1286)Online publication date: 1-Sep-2010
https://dl.acm.org/doi/10.1109/TVLSI.2009.2024116
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Reducing Test Application Time Through Test Data Mutation Encoding
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Published In

DATE '02: Proceedings of the conference on Design, automation and test in Europe

March 2002

1072 pages

ISBN:0769514715

Publisher

IEEE Computer Society

United States

Publication History

Published: 04 March 2002

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DATE02

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SIGDA

DATE02: Design, Automation and Test in Europe

March 4 - 8, 2002

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Tenentes VKavousianos XPhillips JHu AGraeb H(2011)Test-data volume and scan-power reduction with low ATE interface for multi-core SoCsProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132489(747-754)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132489
Li JLiu XZhang YHu YLi XXu Q(2011)Capture-power-aware test data compression using selective encodingIntegration, the VLSI Journal10.1016/j.vlsi.2011.01.00544:3(205-216)Online publication date: 1-Jun-2011
https://dl.acm.org/doi/10.1016/j.vlsi.2011.01.005
Basu KMishra P(2010)Test data compression using efficient bitmask and dictionary selection methodsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.202411618:9(1277-1286)Online publication date: 1-Sep-2010
https://dl.acm.org/doi/10.1109/TVLSI.2009.2024116
Koutsoupia MKalligeros EKavousianos XNikolos DBenini LDe Micheli GAl-Hashimi BMueller W(2009)LFSR-based test-data compression with self-stoppable seedsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874975(1482-1487)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874975
Tenentes VKavousianos XKalligeros ESciuto D(2008)State skip LFSRsProceedings of the conference on Design, automation and test in Europe10.1145/1403375.1403488(474-479)Online publication date: 10-Mar-2008
https://dl.acm.org/doi/10.1145/1403375.1403488
Kavousianos XKalligeros ENikolos D(2008)Multilevel-Huffman test-data compression for IP cores with multiple scan chainsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200044816:7(926-931)Online publication date: 1-Jul-2008
https://dl.acm.org/doi/10.1109/TVLSI.2008.2000448
Lin SLee CChen JChen JLuo KWu W(2007)A multilayer data copy test data compression scheme for reducing shifting-in power for multiple scan designIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.89923215:7(767-776)Online publication date: 1-Jul-2007
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Han YHu YLi XLi HChandra A(2007)Embedded test decompressor to reduce the required channels and vector memory of tester for complex processor circuitIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.89365215:5(531-540)Online publication date: 1-May-2007
https://dl.acm.org/doi/10.1109/TVLSI.2007.893652
Balakrishnan KTouba N(2006)Improving linear test data compressionIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2006.88641714:11(1227-1237)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/TVLSI.2006.886417
Touba N(2006)Survey of Test Vector Compression TechniquesIEEE Design & Test10.1109/MDT.2006.10523:4(294-303)Online publication date: 1-Jul-2006
https://dl.acm.org/doi/10.1109/MDT.2006.105
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