Predicting the worst-case execution time (WCET) and best-case execution time (BCET) of a real-time program is a challenging task. Though much progress has been made in obtaining tighter timing predictions by using techniques that model the architectural features of a machine, significant overestimations of WCET and underestimations of BCET can still occur. It is essential to accurately calculate the number of loop iterations for all loops in order to tightly bound the program's execution time since most of a typical program's execution takes place inside of loops. In addition, dependences on data values can constrain the outcome of conditional branches and the corresponding set of paths that can be taken in a program. This dissertation describes how timing analysis can be improved when these two types of constraints are addressed. First, the minimum and maximum number of iterations are automatically calculated. Loops with multiple exit conditions or a varying number of iterations are also addressed. Second, constraints on branches are automatically detected during compilation. These branch constraints are then used to determine how many times each path in a loop or function can be taken. Finally, this iteration and branch constraint information is automatically utilized to obtain tighter bounds on the execution time. Not only does the timing analysis provide significantly tighter WCET and BCET predictions, the analysis response time is typically faster as well.
Cited By
- Coffman J, Healy C, Mueller F and Whalley D Generalizing parametric timing analysis Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, (152-154)
- Coffman J, Healy C, Mueller F and Whalley D (2007). Generalizing parametric timing analysis, ACM SIGPLAN Notices, 42:7, (152-154), Online publication date: 13-Jul-2007.
- Estep J and Healy C (2005). A flexible tool for visualizing assembly code, Journal of Computing Sciences in Colleges, 20:3, (55-67), Online publication date: 1-Feb-2005.
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