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Architecture of centralized field-configurable memory

Authors:

Steven J. E. Wilton,

Zvonko G. VranesicAuthors Info & Claims

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

Pages 97 - 103

https://doi.org/10.1145/201310.201326

Published: 15 February 1995 Publication History

Abstract

As the capacities of FPGAs grow, it becomes feasible to implement the memory portions of systems directly on an FPGA together with logic. We believe that such an FPGA must contain specialized architectural support in order to implement memories efficiently. The key feature of such architectural support is that it must be flexible enough to accommodate many different memory shapes (widths and depths) as well as allowing different numbers of independently-addressed memory blocks. This paper describes a family of centralized Field-Configurable Memory architectures which consist of a number of memory arrays and dedicated mapping blocks to combine these arrays. We also present a method for comparing these architectures, and use this method to examine the tradeoffs involved in choosing the array size and mapping block capabilities.

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Cited By

Tatsumura KYazdanshenas SBetz V(2018)Enhancing FPGAs with Magnetic Tunnel Junction-Based Block RAMsACM Transactions on Reconfigurable Technology and Systems10.1145/315442511:1(1-22)Online publication date: 26-Jan-2018
https://dl.acm.org/doi/10.1145/3154425
Varma BPaul KBalakrishnan MVarma BPaul KBalakrishnan M(2016)Related WorkArchitecture Exploration of FPGA Based Accelerators for BioInformatics Applications10.1007/978-981-10-0591-6_2(9-28)Online publication date: 3-Mar-2016
https://doi.org/10.1007/978-981-10-0591-6_2
Singh SSingh RBhatia M(2012)Design flow of reconfigurable embedded system architecture using LUTs/PLAs2012 2nd IEEE International Conference on Parallel, Distributed and Grid Computing10.1109/PDGC.2012.6449851(385-390)Online publication date: Dec-2012
https://doi.org/10.1109/PDGC.2012.6449851
Show More Cited By

Index Terms

Architecture of centralized field-configurable memory
1. Hardware

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cover image ACM Conferences

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

February 1995

174 pages

ISBN:089791743X

DOI:10.1145/201310

Chairmen:
Pak K. Chan
Univ. of California at Santa Cruz, Santa Cruz
,
Jonathan Rose
Univ. of Toronto, Toronto, Ont., Canada

Copyright © 1995 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 February 1995

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FPGA95: ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 12 - 14, 1995

California, Monterey, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Citations

Cited By

Tatsumura KYazdanshenas SBetz V(2018)Enhancing FPGAs with Magnetic Tunnel Junction-Based Block RAMsACM Transactions on Reconfigurable Technology and Systems10.1145/315442511:1(1-22)Online publication date: 26-Jan-2018
https://dl.acm.org/doi/10.1145/3154425
Varma BPaul KBalakrishnan MVarma BPaul KBalakrishnan M(2016)Related WorkArchitecture Exploration of FPGA Based Accelerators for BioInformatics Applications10.1007/978-981-10-0591-6_2(9-28)Online publication date: 3-Mar-2016
https://doi.org/10.1007/978-981-10-0591-6_2
Singh SSingh RBhatia M(2012)Design flow of reconfigurable embedded system architecture using LUTs/PLAs2012 2nd IEEE International Conference on Parallel, Distributed and Grid Computing10.1109/PDGC.2012.6449851(385-390)Online publication date: Dec-2012
https://doi.org/10.1109/PDGC.2012.6449851
Jacob JChow PKaptanoglu STrimberger S(1999)Memory interfacing and instruction specification for reconfigurable processorsProceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays10.1145/296399.296446(145-154)Online publication date: 1-Feb-1999
https://dl.acm.org/doi/10.1145/296399.296446
Kaviani ABrown S(1999)The Hybrid Field-Programmable ArchitectureIEEE Design & Test10.1109/54.76520616:2(74-83)Online publication date: 1-Apr-1999
https://dl.acm.org/doi/10.1109/54.765206
Wilton SCong JKaptanoglu S(1998)SMAPProceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays10.1145/275107.275137(171-178)Online publication date: 1-Mar-1998
https://dl.acm.org/doi/10.1145/275107.275137
Wilton SRose JVranesic ZEbeling C(1997)Memory-to-memory connection structures in FPGAs with embedded memory arraysProceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays10.1145/258305.258307(10-16)Online publication date: 9-Feb-1997
https://dl.acm.org/doi/10.1145/258305.258307
Kaviani ABrown SRose JEbeling C(1996)Hybrid FPGA architectureProceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays10.1145/228370.228371(3-9)Online publication date: 15-Feb-1996
https://dl.acm.org/doi/10.1145/228370.228371
Brown S(1996)FPGA Architectural ResearchIEEE Design & Test10.1109/54.54453113:4(9-15)Online publication date: 1-Dec-1996
https://dl.acm.org/doi/10.1109/54.544531
Ngai TRose JWilton S(1995)An SRAM-programmable field-configurable memoryProceedings of the IEEE 1995 Custom Integrated Circuits Conference10.1109/CICC.1995.518232(499-502)Online publication date: 1995
https://doi.org/10.1109/CICC.1995.518232

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