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Multi-way system partitioning into a single type or multiple types of FPGAs

Authors:

Dennis J.-H. Huang,

Andrew B. KahngAuthors Info & Claims

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

Pages 140 - 145

https://doi.org/10.1145/201310.201332

Published: 15 February 1995 Publication History

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Abstract

This paper considers the problem of partitioning a circuit into a collection of subcircuits, such that each subcircuit is feasible for some device from an FPGA library, and the total cost of devices is minimized. We propose a three-phase heuristic that uses ordering, clustering, and dynamic programming to achieve good solutions. Experimental comparisons are made with the previous methods of [4][9].

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Cited By

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Bustany IGasparyan GKahng AKoutis IPramanik BWang Z(2023)An Open-Source Constraints-Driven General Partitioning Multi-Tool for VLSI Physical Design2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323975(1-9)Online publication date: 28-Oct-2023
https://doi.org/10.1109/ICCAD57390.2023.10323975
Krupnova HSaucier G(1999)Iterative improvement based multi-way netlist partitioning for FPGAsProceedings of the conference on Design, automation and test in Europe10.1145/307418.307569(117-es)Online publication date: 1-Jan-1999
https://dl.acm.org/doi/10.1145/307418.307569
Krupnova HSaucier G(1999)Iterative improvement based multi-way netlist partitioning for FPGAsDesign, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)10.1109/DATE.1999.761187(587-594)Online publication date: 1999
https://doi.org/10.1109/DATE.1999.761187
Show More Cited By

Index Terms

Multi-way system partitioning into a single type or multiple types of FPGAs

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Published In

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

February 1995

174 pages

ISBN:089791743X

DOI:10.1145/201310

Chairmen:
Pak K. Chan
Univ. of California at Santa Cruz, Santa Cruz
,
Jonathan Rose
Univ. of Toronto, Toronto, Ont., Canada

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 February 1995

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FPGA95

Sponsor:

SIGDA

FPGA95: ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 12 - 14, 1995

California, Monterey, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

View all

Bustany IGasparyan GKahng AKoutis IPramanik BWang Z(2023)An Open-Source Constraints-Driven General Partitioning Multi-Tool for VLSI Physical Design2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323975(1-9)Online publication date: 28-Oct-2023
https://doi.org/10.1109/ICCAD57390.2023.10323975
Krupnova HSaucier G(1999)Iterative improvement based multi-way netlist partitioning for FPGAsProceedings of the conference on Design, automation and test in Europe10.1145/307418.307569(117-es)Online publication date: 1-Jan-1999
https://dl.acm.org/doi/10.1145/307418.307569
Krupnova HSaucier G(1999)Iterative improvement based multi-way netlist partitioning for FPGAsDesign, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)10.1109/DATE.1999.761187(587-594)Online publication date: 1999
https://doi.org/10.1109/DATE.1999.761187
Fang WWu AChawla BBryant RRabaey J(1998)Performance-driven multi-FPGA partitioning using functional clustering and replicationProceedings of the 35th annual Design Automation Conference10.1145/277044.277125(283-286)Online publication date: 1-May-1998
https://dl.acm.org/doi/10.1145/277044.277125
Burra RBhatia D(1998)Timing driven multi-FPGA board partitioningProceedings Eleventh International Conference on VLSI Design10.1109/ICVD.1998.646609(234-237)Online publication date: 1998
https://doi.org/10.1109/ICVD.1998.646609
Fang WWu ARutenbar ROtten R(1997)A hierarchical functional structuring and partitioning approach for multiple-FPGA implementationsProceedings of the 1996 IEEE/ACM international conference on Computer-aided design10.5555/244522.244946(638-643)Online publication date: 1-Jan-1997
https://dl.acm.org/doi/10.5555/244522.244946
Liu HWong DKahng ASarrafzadeh M(1997)Network flow based multi-way partitioning with area and pin constraintsProceedings of the 1997 international symposium on Physical design10.1145/267665.267673(12-17)Online publication date: 1-Apr-1997
https://dl.acm.org/doi/10.1145/267665.267673
Vahid FEbeling C(1997)I/O and performance tradeoffs with the FunctionBus during multi-FPGA partitioningProceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays10.1145/258305.258309(27-34)Online publication date: 9-Feb-1997
https://dl.acm.org/doi/10.1145/258305.258309
Wen-Jong Fang Wu ATi-Yen Yen Tsair-Chin Lin (1997)DP-Gen: a datapath generator for multiple-FPGA applicationsProceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference10.1109/ASPDAC.1997.600337(563-568)Online publication date: 1997
https://doi.org/10.1109/ASPDAC.1997.600337
Johannes FPennino TYoffa E(1996)Partitioning of VLSI circuits and systemsProceedings of the 33rd annual Design Automation Conference10.1145/240518.240535(83-87)Online publication date: 1-Jun-1996
https://dl.acm.org/doi/10.1145/240518.240535
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Spectral-based multi-way FPGA partitioning

Two metaheuristic approaches for solving multidimensional two-way number partitioning problem

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