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The potential in energy efficiency of a speculative chip-multiprocessor

Published: 27 June 2004 Publication History

Abstract

While lower supply voltage is effective for energy reduction, it suffers performance loss. To mitigate the loss, we propose to execute only the part, which does not have any influence on execution speed, with low-speed and low-voltage. We are investigating a multithreaded execution, named Contrail Architecture, which divides an instruction stream into two streams using trace-level value prediction. One is the speculation stream, which is the main part of a program and is applied value predictions. The other is the verification stream, which verifies the predictions. The energy consumption is reduced by the decrease in the execution time in the speculation stream and by the low-speed execution in the verification stream. This paper evaluates its potential in energy efficiency.

References

[1]
T. Koushiro et al.: A trace-level value predictor for Contrail processors, ACM Computer Architecture News, 31(3), 2003.
[2]
M. Pilla et al.: Predicting trace inputs with dynamic trace memorization: determining speedup upper bounds, PACT, 2001.
[3]
M. Franklin: Multiscalar processors, Kluwer, 2003.
[4]
K. Sundaramoorthy et al.: Slipstream processors: improving both performance and fault tolerance, ASPLOS, 2000.
[5]
E. Larson et al.: MASE: A novel infrastructure for detailed microarchitectural modeling, ISPASS, 2001.
[6]
L. Codrescu et al.: On dynamic speculative thread partitioning and the MEM-slicing algorithm, PACT, 1999.
[7]
P. Marcuello et al.: Thread partitioning and value prediction for exploiting speculative thread-level parallelism, IEEE Transactions on Computers, 53(2), 2004.
[8]
M. Guthaus et al.: MiBench: a free, commercially representative embedded benchmark suite, WWC, 2001.

Cited By

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  • (2006)Improving energy efficiency via speculative multithreading on multicore processorsProceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation10.1007/11847083_54(553-562)Online publication date: 13-Sep-2006

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cover image ACM Conferences
SPAA '04: Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures
June 2004
332 pages
ISBN:1581138407
DOI:10.1145/1007912
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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 27 June 2004

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Author Tags

  1. dual pipeline
  2. energy efficiency
  3. speculative multithreading

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SPAA04

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Overall Acceptance Rate 447 of 1,461 submissions, 31%

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  • (2006)Improving energy efficiency via speculative multithreading on multicore processorsProceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation10.1007/11847083_54(553-562)Online publication date: 13-Sep-2006

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