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A reconfigurable architecture for load-balanced rendering

Published: 30 July 2005 Publication History

Abstract

Commodity graphics hardware has become increasingly programmable over the last few years but has been limited to fixed resource allocation. These architectures handle some workloads well, others poorly; load-balancing to maximize graphics hardware performance has become a critical issue. In this paper, we explore one solution to this problem using compile-time resource allocation. For our experiments, we implement a graphics pipeline on Raw, a tile-based multicore processor. We express both the full graphics pipeline and the shaders using StreamIt, a high-level language based on the stream programming model. The programmer specifies the number of tiles per pipeline stage, and the StreamIt compiler maps the computation to the Raw architecture.We evaluate our reconfigurable architecture using a mix of common rendering tasks with different workloads and improve throughput by 55-157% over a static allocation. Although our early prototype cannot compete in performance against commercial state-of-the-art graphics processors, we believe that this paper describes an important first step in addressing the load-balancing challenge.

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  • (2017)Effective static bin patterns for sort-middle renderingProceedings of High Performance Graphics10.1145/3105762.3105777(1-10)Online publication date: 28-Jul-2017
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cover image ACM Conferences
HWWS '05: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
July 2005
121 pages
ISBN:1595930868
DOI:10.1145/1071866
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 30 July 2005

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GH05: Graphics Hardware 2005
July 30 - 31, 2005
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Overall Acceptance Rate 37 of 94 submissions, 39%

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Cited By

View all
  • (2019)"Deep reinforcement learning for search, recommendation, and online advertising: a survey" by Xiangyu Zhao, Long Xia, Jiliang Tang, and Dawei Yin with Martin Vesely as coordinatorACM SIGWEB Newsletter10.1145/3320496.33205002019:Spring(1-15)Online publication date: 29-Jul-2019
  • (2019)"Are you an influencer, or a lurker? why not both! understanding alternate, opposite behaviors in complex social network systems" by Diego Perna, Roberto Interdonato, and Andrea Tagarelli with Martin Vesely as coordinatorACM SIGWEB Newsletter10.1145/3320496.33204992019:Spring(1-8)Online publication date: 29-Jul-2019
  • (2017)Effective static bin patterns for sort-middle renderingProceedings of High Performance Graphics10.1145/3105762.3105777(1-10)Online publication date: 28-Jul-2017
  • (2016)A machine learning approach to mapping streaming workloads to dynamic multicore processorsACM SIGPLAN Notices10.1145/2980930.290795151:5(113-122)Online publication date: 13-Jun-2016
  • (2016)HCloudACM SIGARCH Computer Architecture News10.1145/2980024.287236544:2(473-488)Online publication date: 25-Mar-2016
  • (2016)A machine learning approach to mapping streaming workloads to dynamic multicore processorsProceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools, and Theory for Embedded Systems10.1145/2907950.2907951(113-122)Online publication date: 13-Jun-2016
  • (2013)Flexible filters in stream programsACM Transactions on Embedded Computing Systems10.1145/2539036.253904113:3(1-26)Online publication date: 24-Dec-2013
  • (2011)Dynamic Fine-Grain Scheduling of Pipeline ParallelismProceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques10.1109/PACT.2011.9(22-32)Online publication date: 10-Oct-2011
  • (2010)An empirical characterization of stream programs and its implications for language and compiler designProceedings of the 19th international conference on Parallel architectures and compilation techniques10.1145/1854273.1854319(365-376)Online publication date: 11-Sep-2010
  • (2009)Universal rasterizer with edge equations and tile-scan triangle traversal algorithm for graphics processing unitsProceedings of the 2009 IEEE international conference on Multimedia and Expo10.5555/1698924.1699259(1358-1361)Online publication date: 28-Jun-2009
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