short-paper

Automatic Conversion of Simulink Models to SysteMoC Actor Networks

Authors:

Stefan Wildermann,

Jürgen TeichAuthors Info & Claims

SCOPES '17: Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems

Pages 81 - 84

https://doi.org/10.1145/3078659.3078668

Published: 12 June 2017 Publication History

Abstract

Simulink has gained a lot of acceptance due to its intuitive through block-based algorithm design, simulation, and rapid prototyping capabilities for signal processing as well as control applications. However, automatic code generation for heterogeneous architectures is currently not supported by Simulink. In the literature, there exist automatic translation toolchains for generation of C or C++ code from Simulink models, which then are used for implementation or validation purposes. But few of them approach the generation of models that can be used in well-established Electronic System Level (ESL) design methodologies and tools. In order to address this issue, we present a methodology to extract an executable specification based on Data Flow Graphs (DFGs) from a given Simulink model. Such a specification can then be used by ESL tools to perform a Design Space Exploration (DSE) and generate code for hardware/software partitions directly from the ESL model. In a case study from signal processing, we validate the equivalence of the results of the simulation in Simulink and the results obtained by simulation of the DFG fully automatically generated from the Simulink model in the SystemC-based actor language SysteMoC.

References

[1]

Mike Barnett, Bor-Yuh Evan Chang, Robert DeLine, Bart Jacobs, and K Rustan M Leino. 2005. Boogie: A modular reusable verifier for object-oriented programs. In International Symposium on Formal Methods for Components and Objects. Springer, 364--387.

Digital Library

[2]

Pontus Boström and Jonatan Wiik. 2016. Contract-based verification of discrete-time multi-rate Simulink models. Software & Systems Modeling 15, 4 (2016), 1141--1161.

Digital Library

[3]

Paul Caspi, Adrian Curic, Aude Maignan, Christos Sofronis, Stavros Tripakis, and Peter Niebert. 2003. From Simulink to SCADE/Lustre to TTA: a layered approach for distributed embedded applications. In ACM Sigplan Notices, Vol. 38. ACM, 153--162.

Digital Library

[4]

Dominik Chessa. 2011. Conception and Implementation of Parallelism Analyses in MATLAB/SIMULLNK Models for programming Embedded Multicore-Systems. Bachelorarbeit, Technische Universität München (2011).

[5]

Joachim Falk, Christian Zebelein, Joachim Keinert, Christian Haubelt, Juergen Teich, and Shuvra S Bhattacharyya. 2010. Analysis of SystemC actor networks for efficient synthesis. ACM Transactions on Embedded Computing Systems (TECS) 10, 2 (2010), 18.

Digital Library

[6]

Andreas Gerstlauer, Christian Haubelt, Andy D Pimentel, Todor P Stefanov, Daniel D Gajski, and Jürgen Teich. 2009. Electronic system-level synthesis methodologies. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 28, 10 (2009), 1517--1530.

Digital Library

[7]

Kaouther Guesmi and Salem Hasnaoui. 2014. Translating of matlab/simulink model to synchronous dataflow graph for parallelism analysis and programming embedded multicore systems. In Design & Test Symposium (IDT), 2014 9th International. IEEE, 156--161.

[8]

Joachim Keinert, Thomas Schlichter, Joachim Falk, Jens Gladigau, Christian Haubelt, Jürgen Teich, Michael Meredith, and others. 2009. System CoDesigner-an Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications. ACM Trans. Des. Autom. Electron. Syst. 14, 1, Article 1 (2009), 23 pages.

Digital Library

[9]

Grant Martin, Brian Bailey, and Andrew Piziali. 2010. ESL design and verification: a prescription for electronic system level methodology. Morgan Kaufmann.

Digital Library

[10]

Mathworks. Available on https://www.mathworks.com/products/simulink.html. Simulation and Model-Based Design. Simulink 2013b (Available on https://www.mathworks.com/products/simulink.html).

[11]

Jürgen Teich. 2012. Hardware/software codesign: The past, the present, and predicting the future. Proc. IEEE 100, Special Centennial Issue (2012), 1411--1430.

[12]

Stavros Tripakis, Christos Sofronis, Paul Caspi, and Adrian Curic. 2005. Translating discrete-time Simulink to Lustre. ACM Transactions on Embedded Computing Systems (TECS) 4, 4 (2005), 779--818.

Digital Library

[13]

Sebastian Warsitz and Maher Fakih. 2016. Simulink-Modell-Übersetzung in synchrone Datenflussgraphen. In MBMV. 89--101.

[14]

Liyuan Zhang, Michael Glaß, Nils Ballmann, and Jürgen Teich. 2015. Bridging algorithm and ESL design: Matlab/Simulink model transformation and validation. In Languages, Design Methods, and Tools for Electronic System Design. Springer, 189--206.

[15]

Changyan Zhou and Ratnesh Kumar. 2012. Semantic translation of simulink diagrams to input/output extended finite automata. Discrete Event Dynamic Systems 22, 2 (2012), 223--247.

Digital Library

Cited By

Letras MFalk JTeich J(2024)Exploring Multi-Reader Buffers and Channel Placement During Dataflow Network Mapping to Heterogeneous Many-Core SystemsIEEE Access10.1109/ACCESS.2024.337507912(39748-39769)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3375079
Letras MFalk JSchwarzer TTeich J(2020)Multi-objective Optimization of Mapping Dataflow Applications to MPSoCs Using a Hybrid Evaluation Combining Analytic Models and MeasurementsACM Transactions on Design Automation of Electronic Systems10.1145/343181426:3(1-33)Online publication date: 31-Dec-2020
https://dl.acm.org/doi/10.1145/3431814
Streit FLetras MWildermann SHackenberg BFalk JBecher ATeich J(2018)Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)10.1109/RECONFIG.2018.8641736(1-8)Online publication date: Dec-2018
https://doi.org/10.1109/RECONFIG.2018.8641736
Show More Cited By

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cover image ACM Other conferences

SCOPES '17: Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems

June 2017

100 pages

ISBN:9781450350396

DOI:10.1145/3078659

Editor:
Sander Stuijk
Eindhoven University of Technology, The Netherlands

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAA: European Design Automation Association
SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 12 June 2017

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Short-paper
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SCOPES '17

SCOPES '17: 20th International Workshop on Software and Compilers for Embedded Systems

June 12 - 13, 2017

Sankt Goar, Germany

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SCOPES '17 Paper Acceptance Rate 6 of 9 submissions, 67%;

Overall Acceptance Rate 38 of 79 submissions, 48%

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Cited By

Letras MFalk JTeich J(2024)Exploring Multi-Reader Buffers and Channel Placement During Dataflow Network Mapping to Heterogeneous Many-Core SystemsIEEE Access10.1109/ACCESS.2024.337507912(39748-39769)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3375079
Letras MFalk JSchwarzer TTeich J(2020)Multi-objective Optimization of Mapping Dataflow Applications to MPSoCs Using a Hybrid Evaluation Combining Analytic Models and MeasurementsACM Transactions on Design Automation of Electronic Systems10.1145/343181426:3(1-33)Online publication date: 31-Dec-2020
https://dl.acm.org/doi/10.1145/3431814
Streit FLetras MWildermann SHackenberg BFalk JBecher ATeich J(2018)Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)10.1109/RECONFIG.2018.8641736(1-8)Online publication date: Dec-2018
https://doi.org/10.1109/RECONFIG.2018.8641736
Streit FLetras MSchid MFalk JWildermann STeich J(2017)High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera SystemsProceedings of the 11th International Conference on Distributed Smart Cameras10.1145/3131885.3131932(174-179)Online publication date: 5-Sep-2017
https://dl.acm.org/doi/10.1145/3131885.3131932

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