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- research-articleJune 2017
Reducing LDPC Soft Sensing Latency by Lightweight Data Refresh for Flash Read Performance Improvement
DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017Article No.: 23, Pages 1–6https://doi.org/10.1145/3061639.3062309In order to relieve reliability problem caused by technology scaling, LDPC codes have been widely applied in flash memories to provide high error correction capability. However, LDPC read performance slowdown along with data retention largely weakens ...
- ArticleNovember 2011
Parallel Concatenation of LDPC Codes with Two Sets of Source Bits
ICETET '11: Proceedings of the 2011 Fourth International Conference on Emerging Trends in Engineering & TechnologyPages 112–115https://doi.org/10.1109/ICETET.2011.46Conventional attempts at using parallel concatenation for LDPC codes have not been widely successful. Interestingly, existing schemes do not rely on the concatenating architecture, but rather on the complementary profile of two carefully selected ...
- ArticleNovember 2011
Erasing Bit Nodes on the Bipartite Graph for Enhanced Performance of LDPC Codes
ICETET '11: Proceedings of the 2011 Fourth International Conference on Emerging Trends in Engineering & TechnologyPages 107–111https://doi.org/10.1109/ICETET.2011.45The proposed work is based on the fact that the complete set of bit nodes for an LDPC code may not always be required at the receiving side for successful decoding. A corresponding strategy is therefore built up. In contrast to common practice, the ...
- ArticleNovember 2009
A proposal of new hybrid ARQ scheme suitable for multi-hop transmissions using LDPC codes
Multi-hop ad-hoc networks are promising candidates for next generation wireless communications. When using HARQ for multi-hop transmissions, each relay node has to decode received messages and request retransmission to its previous node when it detects ...
- ArticleMay 2009
A Novel Log-BP Decoding Algorithm for LDPC Codes
WCSE '09: Proceedings of the 2009 WRI World Congress on Software Engineering - Volume 01Pages 305–307https://doi.org/10.1109/WCSE.2009.200In this paper, we present a simplification of log-BP algorithm which is able to reduce iterative times of decoding algorithm and save the hardware resource of decoder for LDPC codes. This simplification designs an improved layered-iterative decoding ...
- articleApril 2009
LDPC codes from Singer cycles
Discrete Applied Mathematics (DAMA), Volume 157, Issue 8Pages 1723–1728https://doi.org/10.1016/j.dam.2009.01.013The main goal of coding theory is to devise efficient systems to exploit the full capacity of a communication channel, thus achieving an arbitrarily small error probability. Low Density Parity Check (LDPC) codes are a family of block codes-characterised ...
- ArticleJanuary 2009
Structured LDPC Codes with Linear Complexity Encoding
CMC '09: Proceedings of the 2009 WRI International Conference on Communications and Mobile Computing - Volume 01Pages 200–203https://doi.org/10.1109/CMC.2009.316Low Density Parity Check (LDPC) codes have stimulated a lot of interest in recent years due to their capacity approaching performance and availability of fast decoding algorithms. The existing encoding scheme for LDPC code usually incurs too high ...
- ArticleJanuary 2009
A LDPC Coding Scheme for Improving the Satellite ATM Links Performance
CMC '09: Proceedings of the 2009 WRI International Conference on Communications and Mobile Computing - Volume 01Pages 303–305https://doi.org/10.1109/CMC.2009.300Satellite ATM networks is a new-type broadband satellite communication networks and plays an important role in the global communication networks. However, a major problem encountered for using satellite links to transport ATM cells is the high bit error ...
