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Reducing LDPC Soft Sensing Latency by Lightweight Data Refresh for Flash Read Performance Improvement

Published: 18 June 2017 Publication History

Abstract

In order to relieve reliability problem caused by technology scaling, LDPC codes have been widely applied in flash memories to provide high error correction capability. However, LDPC read performance slowdown along with data retention largely weakens the access speed advantage of flash memories. This paper considers to apply the concept of refresh, that were used for flash lifetime improvement, to optimize flash read performance. Exploiting data read characteristics, this paper proposes LDR, a lightweight data refresh method, that aggressively corrects errors in read-hot pages with long read latency and reprograms error-free data into new pages. Experimental results show that LDR can achieve 29% read performance improvement with only 0.2% extra P/E cycles on average, which causes negligible overhead on flash lifetime.

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Cited By

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  • (2024)Modeling Retention Errors of 3D NAND Flash for Optimizing Data PlacementACM Transactions on Design Automation of Electronic Systems10.1145/365910129:4(1-24)Online publication date: 16-Apr-2024
  • (2024)On Enhancing Data Integrity with Low-cost Retention-Refillable Programming SchemeProceedings of the 39th ACM/SIGAPP Symposium on Applied Computing10.1145/3605098.3635905(420-427)Online publication date: 8-Apr-2024
  • (2024)Adaptive Differential Wearing for Read Performance Optimization on High-Density nand Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.329797143:1(380-393)Online publication date: Jan-2024
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  1. Reducing LDPC Soft Sensing Latency by Lightweight Data Refresh for Flash Read Performance Improvement

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      cover image ACM Conferences
      DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017
      June 2017
      533 pages
      ISBN:9781450349277
      DOI:10.1145/3061639
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 18 June 2017

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      Author Tags

      1. Data Refresh
      2. Flash Read Performance
      3. LDPC Codes

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      • Research-article
      • Research
      • Refereed limited

      Funding Sources

      • National 973 Fundamental Basic Research Program
      • National Science Foundation of China
      • National 863 Program

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      Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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      62nd ACM/IEEE Design Automation Conference
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      Cited By

      View all
      • (2024)Modeling Retention Errors of 3D NAND Flash for Optimizing Data PlacementACM Transactions on Design Automation of Electronic Systems10.1145/365910129:4(1-24)Online publication date: 16-Apr-2024
      • (2024)On Enhancing Data Integrity with Low-cost Retention-Refillable Programming SchemeProceedings of the 39th ACM/SIGAPP Symposium on Applied Computing10.1145/3605098.3635905(420-427)Online publication date: 8-Apr-2024
      • (2024)Adaptive Differential Wearing for Read Performance Optimization on High-Density nand Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.329797143:1(380-393)Online publication date: Jan-2024
      • (2024)CDS: Coupled Data Storage to Enhance Read Performance of 3D TLC NAND Flash MemoryIEEE Transactions on Computers10.1109/TC.2023.333847473:3(694-707)Online publication date: Mar-2024
      • (2023)Flash-Based Solid-State Storage Reduces LDPC Read Retry SchemeProceedings of the 7th International Conference on Computer Science and Application Engineering10.1145/3627915.3628024(1-6)Online publication date: 17-Oct-2023
      • (2023)ALCod: Adaptive LDPC Coding for 3-D NAND Flash Memory Using Inter-Layer RBER VariationIEEE Transactions on Consumer Electronics10.1109/TCE.2023.331963869:4(1068-1081)Online publication date: Nov-2023
      • (2023)Retention-Aware Read Acceleration Strategy for LDPC-Based NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.328932842:12(4597-4605)Online publication date: Dec-2023
      • (2023)Access Characteristic Guided Partition for Nand Flash-Based High-Density SSDsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.328217542:12(4643-4656)Online publication date: Dec-2023
      • (2023)MGC: Multiple-Gray-Code for 3D NAND Flash based High-Density SSDs2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10070946(122-136)Online publication date: Feb-2023
      • (2023)Combining Cache and Refresh to Optimize SSD Read Performance SchemeAdvanced Parallel Processing Technologies10.1007/978-981-99-7872-4_7(113-129)Online publication date: 8-Nov-2023
      • Show More Cited By

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