Commutativity-Based Concurrency Control for Abstract Data Types
Two novel concurrency algorithms for abstract data types are presented that ensure serializability of transactions. It is proved that both algorithms ensure a local atomicity property called dynamic atomicity. The algorithms are quite general, ...
Constructing Two-Writer Atomic Registers
A two-writer, n-reader atomic memory register is constructed from two one-writer, (n+1)-reader atomic memory registers. There are no restrictions on the size of the constructed register. The simulation requires only a single extra bit per real register ...
The Formal Specification and Design of a Distributed Electronic Funds-Transfer System
The design of an electronic funds-transfer (EFT) system, using the UNITY parallel programming methodology, is presented. The process begins with a high-level specification that captures the essence of transaction processing in the system. In a series of ...
Space-Efficient and Fault-Tolerant Message Routing in Outerplanar Networks
The problem of designing space- and communication-efficient routing schemes for networks that experience faults is addressed. For any outerplanar network containing t faults, a succinct routing scheme is presented that uses O( alpha tn) space and ...
A Compiler that Increases the Fault Tolerance of Asynchronous Protocols
A compiler that increases the fault tolerance of certain asynchronous protocols is presented. Specifically, it transforms a source protocol that is resilient to crash faults into an object protocol that is resilient to Byzantine faults. The compiler ...
Iterative Algorithms for Solution of Large Sparse Systems of Linear Equations on Hypercubes
Finite-element discretization produces linear equations in the form Ax=b, where A is large, sparse, and banded with proper ordering of the variables x. The solution of such equations on distributed-memory message-passing multiprocessors implementing the ...
A Novel Technique for Efficient Parallel Implementation of a Classical Logic/Fault Simulation Problem
A technique is presented for formulating the logic/fault simulation of VLSI array logic in terms of standard vector and matrix operation primitives that are well supported on all scientific supercomputers, high-end mainframes, and minisupercomputers ...
Synthesizing Linear Array Algorithms from Nested FOR Loop Algorithms
The mapping of algorithms structured as depth-p nested FOR loops into special-purpose systolic VLSI linear arrays is addressed. The mappings are done by using linear functions to transform the original sequential algorithms into a form suitable for ...
A Linear Algebraic Model of Algorithm-Based Fault Tolerance
A linear algebraic interpretation is developed for previously proposed algorithm-based fault tolerance schemes. The concepts of distance, code space, and the definitions of detection and correction in the vector space R/sup n/ are explained. The number ...
Efficient Parallel Convex Hull Algorithms
Parallel algorithms are presented to identify (i.e. detect and enumerate) the extreme points of the convex hull of a set of planar points using a hypercube, pyramid, tree, mesh-of-trees, mesh with reconfigurable bus, exclusive-read-exclusive-write ...
A Benchmark Parallel Sort for Shared Memory Multiprocessors
The first parallel sort algorithm for shared memory MIMD (multiple-instruction-multiple-data-stream) multiprocessors that has a theoretical and measured speedup near linear is exhibited. It is based on a novel asynchronous parallel merge that evenly ...
Partitioning Techniques for Large-Grained Parallelism
A model is presented for parallel processing in loosely coupled multiprocessing environments, such as networks of computer workstations, that are amenable to large-grained parallelism. The model takes into account the overhead involved in data ...
Circuit Simulation on Shared-Memory Multiprocessors
Reports the parallelization on a shared-memory vector multiprocessor of the computationally intensive components of a circuit simulator-matrix assembly (including device model evaluation) and the unstructured sparse linear system solution. A theoretical ...
Simulating Essential Pyramids
Pyramid computers, and more generally pyramid algorithms, for image processing have the advantage of providing regular structure with a base naturally identified with an input image and a logarithmic height that permits rapid reduction of information. ...
Pairwise Reduction for the Direct, Parallel Solution of Sparse, Unsymmetric Sets of Linear Equations
A paradigm for concurrent computing is explored in which a group of autonomous, asynchronous processes shares a common memory space and cooperates to solve a single problem. The processes synchronize with only a few others at a time; barrier ...
Reliable Broadcast in Hypercube Multicomputers
A simple algorithm for broadcasting in a hypercube multicomputer containing faulty nodes/links is proposed. The algorithm delivers multiple copies of the broadcast message through disjoint paths to all the modes in the system. Its salient feature is ...
Concurrent Access of Priority Queues
Contention for the shared heap limits the obtainable speedup in parallel algorithms using this data structure as a priority queue. An approach that allows concurrent insertions and deletions on the heap in a shared-memory multiprocessor is presented. ...
A Randomized Parallel Backtracking Algorithm
A technique for parallel backtracking using randomization is proposed. Its main advantage is that good speedups are possible with little or no interprocessor communication. The speedup obtainable is problem-dependent. In those cases where the problem ...
