A low power and high resolution data logger for submarine seismic monitoring
The design, implementation and characterization of a digital waveform recorder for ocean bottom seismic monitoring is here reported. The system is capable of synchronously acquiring, and logging on a flash memory bank, four high resolution signals. ...
A task graph execution manager for reconfigurable multi-tasking systems
Reconfigurable hardware can be used to build multi-tasking systems that dynamically adapt themselves to the requirements of the running applications. This is especially useful in embedded systems, since the available resources are very limited and the ...
A modeling tool for simulating and design of on-chip network systems
The conception of Network-on-Chip (NoC) presents system designers with a new approach to the design of on-chip inter-connection structures. However, such networks present designers with a large number of design parameters and decisions, many of which ...
Architectural design and FPGA implementation of radix-4 CORDIC processor
A new scaled radix-4 CORDIC architecture that incorporates pipelining and parallelism is presented. The latency of the architecture is n/2 clock cycles and throughput rate is one valid result per n/2 clocks for n bit precision. A 16 bit radix-4 CORDIC ...
Design and implementation of Performance Analysis Unit (PAU) for AXI-based multi-core System on Chip (SOC)
With the rapid development of semiconductor technology, more complicated systems have been integrated into single chips. However, system performance is not increased in proportion to the gate-count of the system. This is mainly because the optimized ...
