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- panelOctober 2017
System-Level Design of Networks-on-Chip for Heterogeneous Systems-on-Chip
NOCS '17: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-ChipArticle No.: 9, Pages 1–6https://doi.org/10.1145/3130218.3130238The network-on-Chip (NoC) is a critical subsystem for many large-scale systems-on-chip (SoC). We present a complete framework for the design and optimization of NoCs at the system-level. By combining a library of pre-designed configurable NoC modules ...
- research-articleOctober 2017
Minimally buffered deflection routing with in-order delivery in a torus
NOCS '17: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-ChipArticle No.: 1, Pages 1–8https://doi.org/10.1145/3130218.3130227Bufferless deflection routing is a serious alternative to wormhole flow control and packet switching. It is based on the principle of deflecting a flit to a non-optimal route instead of buffering it, when two flits compete for the same link. The major ...
- research-articleOctober 2017
Improving the Reliability and Energy-Efficiency of High-Bandwidth Photonic NoC Architectures with Multilevel Signaling
NOCS '17: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-ChipArticle No.: 4, Pages 1–8https://doi.org/10.1145/3130218.3130226Photonic network-on-chip (PNoC) architectures employ photonic waveguides with dense-wavelength-division-multiplexing (DWDM) for signal traversal and microring resonators (MRs) for on-off-keying (OOK) based signal modulation, to enable high bandwidth on-...
- research-articleOctober 2017
Energy and Area Efficient Near Field Inductive Coupling: A Case Study on 3D NoC
NOCS '17: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-ChipArticle No.: 5, Pages 1–8https://doi.org/10.1145/3130218.3130224Near Field Inductive Coupling (NFIC) enables design of energy efficient and robust three-dimensional (3D) manycore systems. The associated design challenges and the trade-offs of the NFIC-based vertical links depend on achievable data-rates, energy and ...
- research-articleOctober 2017
Distributed and Dynamic Shared-Buffer Router for High-Performance Interconnect
NOCS '17: Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-ChipArticle No.: 2, Pages 1–8https://doi.org/10.1145/3130218.3130223Most Network-on-Chip routers dedicate a set of buffers to the input and/or output ports. This design decision leads to buffer underutilization especially when running applications with non-uniform traffic patterns. In order to maximize resource usage ...
