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- research-articleJanuary 2012
Heterogeneous integration to simplify many-core architecture simulations
RAPIDO '12: Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsPages 17–24https://doi.org/10.1145/2162131.2162134The EU Apple-CORE project has explored the design and implementation of novel general-purpose many-core chips featuring hardware microthreading and hardware support for concurrency management. The introduction of the latter in the cores ISA has required ...
- research-articleJanuary 2012
SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation
RAPIDO '12: Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsPages 9–16https://doi.org/10.1145/2162131.2162133Due to the increasing complexity of new multiprocessor systems on chip, flexible and accurate simulators become a necessity for exploring the vast design space solution. In a streaming execution model, only a well-balanced pipeline can lead to an ...
- research-articleJanuary 2012
Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores
RAPIDO '12: Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsPages 1–8https://doi.org/10.1145/2162131.2162132The current many-core architectures are generally evaluated using cycle-accurate simulations. However these detailed simulations of the architecture make the evaluation of large programs very slow. Since the focus in many-core architecture is shifting ...