Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Skip to main content

Advertisement

Springer Nature Link
Log in

High-Efficiency Multiobjective Synchronous Modeling and Solution of Analog ICs

  • Published:
Circuits, Systems, and Signal Processing Aims and scope Submit manuscript

Abstract

An artful complex algorithm to achieve high-efficiency high-precision multiobjective synchronous modeling and optimal solving of an analog IC is proposed. The complete approach combines response surface methodology (RSM) with an improved support vector regression (SVR) machine, which shows obvious superiority in nonlinear modeling and global solution by reduced training datasets. Targeting an analog comparator circuit as the experimental object, 33 sets of optimal design parameters are solved first in the RSM preprocessing stage, and these high-quality sample data can be subsequently input to the SVR machine for model training. In the second SVR solving stage, a differential evolution (DE) algorithm is adopted to further auto-optimize the modeling factors of the SVR machine to improve the accuracy of the nonlinear model. Finally, an SVR model of the comparator circuit can be obtained to accurately describe the response relationships of performance metrics and the corresponding design parameters that are expected by designers. With the comparator design based on TSMC 65 nm/1.2 V standard CMOS technology, we compare the SVR model-based prediction value with the Cadence-based simulation result by design test-bench and observe error lower than 3%. This work proved that the proposed complex RSM-DE-SVR algorithm is significantly practical and effective to benefit the aided optimization design of analog ICs.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7

Similar content being viewed by others

Data Availability

The data that support the findings of this study are available from the corresponding author upon reasonable request.

References

  1. M. Abaszade, S. Effati, Stochastic support vector machine for classifying and regression of random variables. Neural Process. Lett. 48(1), 1–29 (2018). https://doi.org/10.1007/s11063-017-9697-0

  2. G. Acampora, R. Schiattarella, Deep neural networks for quantum circuit mapping. Neural Comput. Appl. 33(20), 13723–13743 (2021). https://doi.org/10.1007/s00521-021-06009-3

    Article  Google Scholar 

  3. Afacan, E., Yelten, M.B., Dündar, G.: Review: Analog design methodologies for reliability in nanoscale CMOS circuits. In: Proceeding on 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Italy, pp. 1–4 (2017)

  4. E. Afacan, N.C. Lourenco, R. Martins et al., Review: Machine learning techniques in analog/RF integrated circuit design, synthesis, layout, and test. Integration 77, 113–130 (2021). https://doi.org/10.1016/j.vlsi.2020.11.006

    Article  Google Scholar 

  5. Angela, D., Daniel, V., Danel, D.: Design and Analysis of Experiments, 2nd ed. Springer (2017)

  6. Barmuta, P., Avolio, G., Ferranti, F., et al.: Large-signal modeling of on-wafer microwave transistors based on response surface methodology. In: Proceeding of the IEEE MTT-S International Microwave Symposium (IMS), Phoenix, AZ, USA, pp. 1–4 (2015)

  7. Budak, A.F., Bhansali, P., Liu, B., et al. DNN-Opt: an RL inspired optimization for analog circuit sizing using deep neural networks. In: Proceeding of the 58th ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, pp. 1219–1224 (2021). https://doi.org/10.1109/DAC18074.2021.9586139

  8. Cashero, Z., Chen, A., Hoppal, R., et al.: Fast evaluation of analog circuits using linear programming. In: Proceeding of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Telecommunication Syst & Networks Dept, Lixouri, Greece, pp. 253–258 (2010). https://doi.org/10.1109/ISVLSI.2010.94

  9. C. Cortes, V.N. Vapnik, Support-vector networks. Machine Learning 20, 273–297 (2004). https://doi.org/10.1023/A:1022627411411

    Article  MATH  Google Scholar 

  10. M.L. Deaton, Review: Response surfaces: designs and analysis. J. Am. Stat. Assoc. 84(405), 222–332 (1989). https://doi.org/10.2307/2289884

    Article  Google Scholar 

  11. G.C. Derringer, R.C. Suich, Simultaneous optimization of several response variables. J. Qual. Technol. 12(4), 214–219 (1980). https://doi.org/10.1080/00224065.1980.11980968

    Article  Google Scholar 

  12. R. Hable, Asymptotic normality of support vector machine variants and other regularized kernel methods. J. Multivar. Anal. 106, 92–117 (2012). https://doi.org/10.1016/j.jmva.2011.11.004

    Article  MathSciNet  MATH  Google Scholar 

  13. Hoxha, G., Melgani, F.: Remote sensing image captioning with SVM-based decoding. In: Proceeding of the IEEE International Geoscience and Remote Sensing Symposium (IGARSS), Electrical Network (2020), pp. 6734–6737. https://doi.org/10.1109/IGARSS39084.2020.9323651

  14. M.H.H. Ishak, F. Ismail, M.S.A. Aziz et al., Optimization of 3D IC stacking chip on molded encapsulation process: a response surface methodology approach. Int. J. Adv. Manuf. Technol. 103(1–4), 1139–1153 (2019). https://doi.org/10.1007/s00170-019-03525-4

    Article  Google Scholar 

  15. Khuri, A.I., Cornell, J.A.: Response Surfaces: Designs and Analyses, 2nd ed. Marcel Dekker, New York (2018)

  16. Kurpukdee, N., Nattapong, S., Chunwijitra, V., et al.: A study of support vector machines for emotional speech recognition. In: Proceeding of the 8th International Conference of Information and Communication Technology for Embedded Systems (IC-ICTES), Thailand, pp. 1–6 (2017)

  17. H. Lin, P. Li, Circuit performance classification with active learning guided sampling for support vector machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9), 1467–1480 (2015). https://doi.org/10.1109/TCAD.2015.2413840

    Article  Google Scholar 

  18. B. Liu, G. Chen, B. Yang et al., Routable and matched layout styles for analog module generation. ACM Trans. Des. Autom. Electron. Syst. 23(4), 47:1-47:17 (2018). https://doi.org/10.1145/3182169

    Article  Google Scholar 

  19. A. Muji, A. Dunya, Optimal Experimental Design for Non-linear Models (Springer, Berlin, 2014)

    Google Scholar 

  20. H. Murata, K. Fujiyoshi, S. Nakatake et al., VLSI module placement based on rectangle-packing by the sequence-pair. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(12), 1518–1524 (1996). https://doi.org/10.1109/43.552084

    Article  Google Scholar 

  21. R.H. Myers, D.C. Montgomery, Response surface methodology: Process and product in optimization using designed experiments. Technometrics 38(3), 285–286 (1996). https://doi.org/10.2307/1270613

    Article  Google Scholar 

  22. Nakatake, S., Fujiyoshi, K., Murata, H., et al.: Module placement on BSG-structure and IC layout applications. In: Proceeding of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, pp. 484–491 (1996). https://doi.org/10.1109/ICCAD.1996.569870

  23. R. Netto, S. Fabre, T.A. Fontana et al., Algorithm selection framework for legalization using deep convolutional neural networks and transfer learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5), 1481–1494 (2022). https://doi.org/10.1109/TCAD.2021.3079126

    Article  Google Scholar 

  24. R. Storn, K.V. Price, Differential evolution—A simple and efficient heuristic for global optimization over continuous spaces. J. Glob. Optim. 11, 341–359 (1997). https://doi.org/10.1023/A:1008202821328

    Article  MathSciNet  MATH  Google Scholar 

  25. Y. Tarabalka, M. Fauvel, J. Chanussot et al., SVM and MRF-based method for accurate classification of hyperspectral images. IEEE Geosci. Remote Sens. Lett. 7(4), 736–740 (2010). https://doi.org/10.1109/LGRS.2010.2047711

    Article  Google Scholar 

  26. Y. Wang, G.C. Temes, Scaling for optimum dynamic range and noise-power tradeoff: a review of analog circuit design techniques. IEEE Solid-State Circuits Mag. 11(2), 98–103 (2019). https://doi.org/10.1109/MSSC.2019.2910646

    Article  Google Scholar 

  27. Y. Xia, A new neural network for solving linear and quadratic programming problems. IEEE Trans. Neural Netw. 7(6), 1544–1548 (1996). https://doi.org/10.1109/72.548188

    Article  Google Scholar 

  28. Xu, B., Zhu, K., Liu, M., et al. Magical: toward fully automated analog ic layout leveraging human and machine intelligence: invited paper. In: Proceeding of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Westminster, CO, USA, pp. 1–8 (2019). https://doi.org/10.1109/ICCAD45719.2019.8942060

  29. Xu, Y., Hsiung, K.-L., Li, X., et al. Opera: optimization with ellipsoidal uncertainty for robust analog ic design. In: Proceedings in 42nd Design Automation Conference (DAC), Anaheim, CA, USA (2005), pp. 632–637. https://doi.org/10.1109/DAC.2005.193888

  30. Q. Yang, G. Qi, W. Gan et al., Transistor compact model based on multi-gradient neural network and its application in SPICE circuit simulations for gate-all-around si cold source FETs. IEEE Trans. Electron. Dev. 68(9), 4181–4188 (2021). https://doi.org/10.1109/TED.2021.3093376

    Article  Google Scholar 

Download references

Acknowledgements

This work was partially supported by National Natural Science Foundation of China (NSFC, Grant No. 61704049) and Graduate Quality Project of HAUST (Grant No. 2020ZYL-008).

Author information

Author notes

  1. Bo Liu and Weizhe Zhang have contributed equally to this work.

Authors and Affiliations

  1. Electrical Engineering College, Henan University of Science and Technology, Luoyang, 471023, China

    Bo Liu, Weizhe Zhang, Kai Li, Wenjuan Duan, Min Liu & Qingduan Meng

Authors
  1. Bo Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Weizhe Zhang
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Kai Li
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Wenjuan Duan
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Min Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. Qingduan Meng
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Bo Liu.

Ethics declarations

Conflict of interest

The authors declare that they have no known conflict of interest that could have appeared to influence the work reported in this study.

Ethics Approval

This article does not contain any studies with human participants or animals performed by any of the authors.

Consent to Participate

This manuscript has been approved by all authors for publication.

Informed Consent

Informed consent was obtained from all individual participants included in the study.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Liu, B., Zhang, W., Li, K. et al. High-Efficiency Multiobjective Synchronous Modeling and Solution of Analog ICs. Circuits Syst Signal Process 42, 1984–2006 (2023). https://doi.org/10.1007/s00034-022-02219-9

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00034-022-02219-9

Keywords