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Parallel in-memory wireless computing

Abstract

Parallel wireless digital communication with ultralow power consumption is critical for emerging edge technologies such as 5G and Internet of Things. However, the physical separation between digital computing units and analogue transmission units in traditional wireless technology leads to high power consumption. Here we report a parallel in-memory wireless computing scheme. The approach combines in-memory computing with wireless communication using memristive crossbar arrays. We show that the system can be used for the radio transmission of a binary stream of 480 bits with a bit error rate of 0/480. The in-memory wireless computing uses two orders of magnitude less power than conventional technology (based on digital-to-analogue and analogue-to-digital converters). We also show that the approach can be applied to acoustic and optical wireless communications.

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Fig. 1: Parallel in-memory wireless computing based on the memristive crossbar array.
Fig. 2: In-memory wireless computing by using a memristive crossbar array.
Fig. 3: Parallel in-memory wireless computing.
Fig. 4: Ultrasonic and optical wireless communications, bit error rate and energy efficiency.

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Source data are provided with this paper. All other data that support the plots within this paper and other findings of this study are available from the corresponding authors upon reasonable request.

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Acknowledgements

This work was supported in part by the National Natural Science Foundation of China (62122036, 62034004, 61921005 and 61974176) and the Strategic Priority Research Program of the Chinese Academy of Sciences (XDB44000000). F.M. would like to acknowledge support from the AIQ Foundation. The microfabrication center of the National Laboratory of Solid State Microstructures (NLSSM) is acknowledged for their technique support.

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Authors

Contributions

C.W. and G.-J.R. equally contributed to this work. F.M., S.-J.L. and C.W. conceived the idea and designed the experiments. F.M. and S.-J.L. supervised the whole project. G.-J.R. and C.W. performed all the experiments and analysed the experimental data. Z.-Z.Y., Y.Z. and Y.L. aided in the experiment design. Z.-Z.Y., W.W. and X.-J.Y. provided help in the device fabrication and circuit assembly. C.P., L.-B.W. and B.C. contributed to the circuit measurements. L.W., C.Z., Y.G. and Z.Z. contributed to the modelling of the wireless communication systems and the corresponding experimental design. C.W., S.-J.L. and F.M. co-wrote the paper.

Corresponding authors

Correspondence to Yixiang Li, Shi-Jun Liang or Feng Miao.

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Nature Electronics thanks Howard Hao Yang, Basem Shihada and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

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Wang, C., Ruan, GJ., Yang, ZZ. et al. Parallel in-memory wireless computing. Nat Electron 6, 381–389 (2023). https://doi.org/10.1038/s41928-023-00965-5

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