Article

Power distribution techniques for dual VDD circuits

Authors:

Sarvesh H. Kulkarni,

Dennis SylvesterAuthors Info & Claims

ASP-DAC '06: Proceedings of the 2006 Asia and South Pacific Design Automation Conference

Pages 838 - 843

https://doi.org/10.1145/1118299.1118490

Published: 24 January 2006 Publication History

Abstract

Extensive research has proposed the use of multiple on-die power supplies (VDD) for reducing power consumption in CMOS circuits. We present a detailed study and design techniques for power delivery systems in dual VDD CMOS circuits. We first show that the total current to be delivered by the voltage supplies is significantly reduced (by 27%-46%) in dual VDD circuits. This current reduction prompts various design strategies that can be employed to design the power delivery system. We describe issues that arise at the system, board and package levels and propose a high-level model for the same. We then provide a new placement driven approach for designing on-die dual VDD power grids. Compared to already existing methods, the dual VDD grids generated by our approach reduce the worst case and average voltage drop by up to 12.3% and 6.8% respectively with no area overhead and sometimes improving wire congestion. We also show that dual VDD circuits can afford lower on-die decoupling capacitance budgets.

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Cited By

Wang JChen XLiao CHu SPhillips JHu AGraeb H(2011)The approximation scheme for peak power driven voltage partitioningProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132486(736-741)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132486
Zhou QShi JLiu BCai Y(2011)Floorplanning considering IR drop in multiple supply voltages island designsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.203742819:4(638-646)Online publication date: 1-Apr-2011
https://dl.acm.org/doi/10.1109/TVLSI.2009.2037428
Cai YLiu BShi JZhou QHong X(2007)Power Delivery Aware Floorplanning for Voltage Island DesignsProceedings of the 8th International Symposium on Quality Electronic Design10.1109/ISQED.2007.121(350-355)Online publication date: 26-Mar-2007
https://dl.acm.org/doi/10.1109/ISQED.2007.121
Show More Cited By

Index Terms

Power distribution techniques for dual VDD circuits
1. Hardware
2. Theory of computation
  1. Design and analysis of algorithms
    1. Approximation algorithms analysis
      1. Routing and network design problems

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Information

Published In

cover image ACM Conferences

ASP-DAC '06: Proceedings of the 2006 Asia and South Pacific Design Automation Conference

January 2006

998 pages

ISBN:0780394518

General Chair:
Fumiyasu Hirose
Cadence Design Systems, Japan

Sponsors

IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS: Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
IPSJ SIG-SLDM: Information Processing Society of Japan, SIG System LSI Design Methodology

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IEEE Press

Publication History

Published: 24 January 2006

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

Wang JChen XLiao CHu SPhillips JHu AGraeb H(2011)The approximation scheme for peak power driven voltage partitioningProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132486(736-741)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132486
Zhou QShi JLiu BCai Y(2011)Floorplanning considering IR drop in multiple supply voltages island designsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2009.203742819:4(638-646)Online publication date: 1-Apr-2011
https://dl.acm.org/doi/10.1109/TVLSI.2009.2037428
Cai YLiu BShi JZhou QHong X(2007)Power Delivery Aware Floorplanning for Voltage Island DesignsProceedings of the 8th International Symposium on Quality Electronic Design10.1109/ISQED.2007.121(350-355)Online publication date: 26-Mar-2007
https://dl.acm.org/doi/10.1109/ISQED.2007.121
Kulkarni SSrivastava ASylvester DBlaauw DChinnery DKeutzer K(2007)Power Optimization using Multiple Supply VoltagesClosing the Power Gap Between ASIC & Custom10.1007/978-0-387-68953-1_8(189-217)Online publication date: 2007
https://doi.org/10.1007/978-0-387-68953-1_8

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