Article

Modelling run-time arbitration by latency-rate servers in dataflow graphs

Authors:

Maarten H. Wiggers,

Marco J. G. Bekooij,

Gerard J. M. SmitAuthors Info & Claims

SCOPES '07: Proceedingsof the 10th international workshop on Software & compilers for embedded systems

Pages 11 - 22

https://doi.org/10.1145/1269843.1269846

Published: 20 April 2007 Publication History

Abstract

In order to obtain a cost-efficient solution, tasks share resources in a Multi-Processor System-on-Chip. In our architecture, shared resources are run-time scheduled. We show how the effects of Latency-Rate servers, which is a class of run-time schedulers, can be included in a dataflow model. The resulting dataflow model, which can have an arbitrary topology, enables us to provide guarantees on the temporal behaviour of the implementation.

Traditionally, the end-to-end behaviour of multiple Latency-Rate servers has been analysed with Latency-Rate analysis, which is a Network Calculus. This paper bridges a gap between Network Calculi and dataflow analysis techniques, since we show that a class of run-time schedulers can now be included in dataflow models, or, from a Network Calculus perspective, that restrictions on the topology of graphs that include run-time scheduling can be removed.

References

[1]

R. Agrawal. Performance Bounds for Flow Control Protocols. IEEE/ACM Transactions on Networking, 7(3):310--323, June 1999.

Digital Library

[2]

M. J. G. Bekooij, S. Parmar, and J. van Meerbergen. Performance Guarantees by Simulation of Process Networks. In Proc. Int'l Workshop on Software and Compilers for Embedded Systems (SCOPES), 2005.

Digital Library

[3]

M. J. G. Bekooij et al. Predictable Embedded Multi-Processor System Design. In Proc. Int'l Workshop on Software and Compilers for Embedded Systems (SCOPES), 2004.

[4]

M. J. G. Bekooij et al. Dataflow Analysis for Real-Time Embedded Multiprocessor System Design, chapter 15. Dynamic and Robust Streaming Between Connected CE Devices. Kluwer Academic Publishers, 2005.

[5]

G. Bilsen et al. Cyclo-Static Dataflow. IEEE Transactions on Signal Processing, 44(2):397--408, February 1996.

Digital Library

[6]

R. L. Cruz. A Calculus for Network Delay, Part I: Network Elements in Isolation. IEEE Transactions on Information Theory, 37(1):114--131, January 1991.

Digital Library

[7]

R. L. Cruz. A Calculus for Network Delay, Part II: Network Analysis. IEEE Transactions on Information Theory, 37(1):132--141, January 1991.

Digital Library

[8]

E. A. de Kock. YAPI: Application Modeling for Signal Processing Systems. In Proc. Design Automation Conference (DAC), 2000.

Digital Library

[9]

F. Bacelli, G. Cohen, G. J. Olsder, and J-P. Quadrat. Synchronization and Linearity: An Algebra for Discrete Event Systems. Wiley, 1992.

[10]

S. Goddard and K. Jeffay. Managing Latency and Buffer Requirements in Processing Graph Chains. The Computer Journal, 44(6), 2001.

[11]

P. Goyal et al. Determining End-to-End Delay Bounds in Heterogeneous Networks. Multimedia Systems, 5:157--163, 1997.

Digital Library

[12]

A. Hung and G. Kesidis. Bandwidth Scheduling for Wide-Area ATM Networks Using Virtual Finishing Times. IEEE/ACM Transactions on Networking, 4(1):49--54, February 1996.

Digital Library

[13]

M. Jersak et al. Performance Analysis of Complex Embedded Systems. International Journal of Embedded Systems, 1(1--2):33--49, 2005.

[14]

Y. Jiang. Relationship between Guaranteed Rate Server and Latency Rate Server. Computer Networks, 43(3):307--315, October 2003.

Digital Library

[15]

G. Kahn. The Semantics of a Simple Language for Parallel Programming. In Information Processing, Stockholm, August 1974.

[16]

E. A. Lee and S. Ha. Scheduling Strategies for Multi-Processor Real-Time DSP. In Proc. IEEE Global Telecommunications Conference and Exhibition (GLOBECOM), November 1989.

[17]

A. Maxiaguine et al. Tuning SoC Platforms for Multimedia Processing: Identifying Limits and Tradeoffs. In Proc. Int'l Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), September 2004.

Digital Library

[18]

C. Otero Pérez et al. Dynamic and Robust Streaming between Connected CE Devices, chapter Resource Reservations in Shared Memory Multiprocessor SoCs. Kluwer Academic Publishers, 2005.

[19]

P. Poplavko et al. Task-Level Timing Models for Guaranteed Performance in Multiprocessor Networks-on-Chip. In Proc. Int'l Conference on Compilers, Architectures, and Synthesis of Embedded Systems (CASES), November 2003.

Digital Library

[20]

R. Reiter. Scheduling Parallel Computations. Journal of the ACM, 15(4):590--599, October 1968.

Digital Library

[21]

S. Sriram and S. S. Bhattacharyya. Embedded Multiprocessors: Scheduling and Synchronization. Marcel Dekker Inc., 2000.

Digital Library

[22]

D. Stiliadis and A. Varma. Latency-Rate Servers: A General Model for Analysis of Traffic Scheduling Algorithms. IEEE/ACM Transactions on Networking, 6(5):611--624, October 1998.

Digital Library

[23]

M. H. Wiggers et al. Efficient Computation of Buffer Capacities for Multi-Rate Real-Time Systems with Back-Pressure. In Proc. Int'l Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), October 2006.

Digital Library

[24]

M. H. Wiggers et al. Efficient Computation of Buffer Capacities for Cyclo-Static Real-Time Systems with Back-Pressure. In Proc. IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), April 2007.

Digital Library

[25]

H. Zhang. Service Disciplines for Guaranteed Performance Service in Packet-Switching Networks. Proceedings of the IEEE, 83(10):1374--1396, October 1995.

[26]

H. Zhang and D. Ferrari. Rate-Controlled Service Disciplines. Journal of High-Speed Networks, 3(4), 1994.

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Skelin MGeilen MCatthoor FHendseth S(2017)Parameterized Dataflow ScenariosIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.259722336:4(669-682)Online publication date: 1-Apr-2017
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Published In

cover image ACM Conferences

SCOPES '07: Proceedingsof the 10th international workshop on Software & compilers for embedded systems

April 2007

127 pages

ISBN:9781450378345

DOI:10.1145/1269843

Editors:
Heiko Falk
University of Dortmund, Germany
,
Peter Marwedel
University of Dortmund, Germany

Copyright © 2007 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAA: European Design Automation Association
ACE Associated Compiler Experts bv
SIGBED: ACM Special Interest Group on Embedded Systems
Artist2 European NoE

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 20 April 2007

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Cited By

Lu ZYao Y(2017)Dynamic Traffic Regulation in NoC-Based SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.258478125:2(556-569)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1109/TVLSI.2016.2584781
Skelin MGeilen MCatthoor FHendseth S(2017)Parameterized Dataflow ScenariosIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.259722336:4(669-682)Online publication date: 1-Apr-2017
https://dl.acm.org/doi/10.1109/TCAD.2016.2597223
Gomony MGarside JAkesson BAudsley NGoossens K(2017)A Globally Arbitrated Memory Tree for Mixed-Time-Criticality SystemsIEEE Transactions on Computers10.1109/TC.2016.259558166:2(212-225)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1109/TC.2016.2595581
Hausmans JBekooij M(2016)A refinement theory for timed-dataflow analysis with support for reorderingProceedings of the 13th International Conference on Embedded Software10.1145/2968478.2968489(1-10)Online publication date: 1-Oct-2016
https://dl.acm.org/doi/10.1145/2968478.2968489
Kurtin PHausmans JBekooij M(2016)HAPIProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906381(60-66)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906381
Kuiper GGeuns SHausmans JBekooij M(2016)Compositional Temporal Analysis Method for Fixed Priority Pre-emptive Scheduled Modal Stream Processing ApplicationsProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906375(98-107)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906375
Kurtin PHausmans JBekooij M(2016)Combining Offsets with Precedence Constraints to Improve Temporal Analysis of Cyclic Real-Time Streaming Applications2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)10.1109/RTAS.2016.7461325(1-12)Online publication date: Apr-2016
https://doi.org/10.1109/RTAS.2016.7461325
Tripakis SLimaye RRavindran KWang GAndrade HGhosal A(2016)Tokens vs. SignalsJournal of Signal Processing Systems10.1007/s11265-015-0971-y85:1(23-43)Online publication date: 1-Oct-2016
https://dl.acm.org/doi/10.1007/s11265-015-0971-y
Skelin MGeilen MCatthoor FHendseth SGirault AGuan N(2015)Parametrized dataflow scenariosProceedings of the 12th International Conference on Embedded Software10.5555/2830865.2830876(95-104)Online publication date: 4-Oct-2015
https://dl.acm.org/doi/10.5555/2830865.2830876
Kuiper GGeuns SBekooij MCorporaal HStuijk S(2015)Utilization Improvement by Enforcing Mutual Exclusive Task Execution in Modal Stream Processing ApplicationsProceedings of the 18th International Workshop on Software and Compilers for Embedded Systems10.1145/2764967.2764970(28-37)Online publication date: 1-Jun-2015
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