Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
article

Enforcing isolation and ordering in STM

Published: 10 June 2007 Publication History

Abstract

Transactional memory provides a new concurrency control mechanism that avoids many of the pitfalls of lock-based synchronization. High-performance software transactional memory (STM) implementations thus far provide weak atomicity: Accessing shared data both inside and outside a transaction can result in unexpected, implementation-dependent behavior. To guarantee isolation and consistent ordering in such a system, programmers are expected to enclose all shared-memory accesses inside transactions.
A system that provides strong atomicity guarantees isolation even in the presence of threads that access shared data outside transactions. A strongly-atomic system also orders transactions with conflicting non-transactional memory operations in a consistent manner.
In this paper, we discuss some surprising pitfalls of weak atomicity, and we present an STM system that avoids these problems via strong atomicity. We demonstrate how to implement non-transactional data accesses via efficient read and write barriers, and we present compiler optimizations that further reduce the overheads of these barriers. We introduce a dynamic escape analysis that differentiates private and public data at runtime to make barriers cheaper and a static not-accessed-in-transaction analysis that removes many barriers completely. Our results on a set of Java programs show that strong atomicity can be implemented efficiently in a high-performance STM system.

References

[1]
A.-R. Adl-Tabatabai, B. T. Lewis, V. S. Menon, B. R. Murphy, B. Saha, and T. Shpeisman. Compiler and runtime support for efficient software transactional memory. In PLDI 2006.
[2]
S. Adve and K. Gharachorloo. Shared memory consistency models: A tutorial. IEEE Computer, 29(12):66--76, 1996.
[3]
J. Aldrich, E. G. Sirer, C. Chambers, and S. Eggers. Comprehensive synchronization elimination for Java. Sci. Comput. Programming, 47(2--3), May-June 2003.
[4]
E. Allen, D. Chase, J. Hallett, V. Luchangco, J.-W. Maessen, S. Ryu, G. L. Steele, Jr., and STobin-Hochstadt. The Fortress language specification version 1.0&$945; http://research.sun.com/projects/plrg/fortress.pdf, 2006.
[5]
C. S. Ananian, K. Asanovic, B. C. Kuszmaul, C. E. Leiserson, and S. Lie. Unbounded transactional memory. In HPCA 2005.
[6]
C. S. Ananian and M. Rinard. Efficient object-based software transactions. In SCOOL 2005.
[7]
M. Berndl, O. Lhoták, F. Qian, L. Hendren, and N. Umanee. Points-to analysis using BDDs. In PLDI 2003.
[8]
B. Blanchet. Escape analysis for object--oriented languages: Application to Java. In OOPSLA 1999.
[9]
C. Blundell, E. C. Lewis, and M. Martin. Subtleties of transactional memory atomicity semantics. Computer Architecture Letters, 5(2), Nov. 2006.
[10]
H. Boehm. Threads cannot be implemented as a library. In PLDI 2005.
[11]
J. Bogda and U. Hölzle. Removing unnecessary synchronization in Java. In OOPSLA 1999.
[12]
C. Boyapati, R. Lee, and M. Rinard. Ownership types for safe programming: Preventing data races and deadlocks. In OOPSLA 2002.
[13]
B. D. Carlstrom, J. Chung, A. McDonald, H. Chafi, C. Kozyrakis, and K. Olukotun. The Atomos transactional programming language. In PLDI 2006.
[14]
P. Charles, C. Donawa, K. Ebcioglu, C. Grothoff, A. Kielstra, C. von Praun, V. Saraswat, and V. Sarkar. X10: an object--oriented approach to non-uniform cluster computing. In OOPSLA 2005.
[15]
J.-D. Choi, M. Gupta, M. J. Serrano, V. C. Sreedhar, and S. P. Midkiff. Escape analysis for Java. In OOPSLA 1999.
[16]
Cray Inc. Chapel Specification 0.4. http://linebreak{0}chapel.cs.linebreak{0}washington.edu/specification.pdf, 2005.
[17]
P. Damron, A. Fedorova, Y. Lev, V. Luchangco, M. Moir, and D. Nussbaum. Hybrid transactional memory. In ASPLOS 2006.
[18]
D. Dice, O. Shalev, and N. Shavit. Transactional Locking II. In DISC 2006.
[19]
T. Domani, G. Goldshtein, E. K. Kolodner, E. Lewis, E. Petrank, and D. Sheinwald. Thread-local heaps for Java. In ISMM 2002.
[20]
C. Flanagan and S. N. Freund. Type inference against races. In SAS 2004.
[21]
K. Fraser. Practical lock freedom. PhD thesis, Cambridge University Computer Laboratory, 2003. Technical Report UCAM-CL-TR-579.
[22]
J. Gray and A. Reuter. Transaction Processing: Concepts and Techniques. Morgan Kaufmann, 1993.
[23]
D. Grossman, J. Manson, and W. Pugh. What do high-level memory models mean for transactions? In ACM SIGPLAN Workshop on Memory Systems Performance & Correctness 2006.
[24]
L. Hammond, B. D. Carlstrom, V. Wong, B. Hertzberg, M. Chen, C. Kozyrakis, and K. Olukotun. Programming with transactional coherence and consistency (tcc). In ASPLOS 2004.
[25]
T. Harris and K. Fraser. Language support for lightweight transactions. In OOPSLA 2003.
[26]
T. Harris, S. Marlow, S. P. Jones, and M. Herlihy. Composable memory transactions. In PPoPP 2005.
[27]
T. Harris, M. Plesko, A. Shinnar, and D. Tarditi. Optimizing memory transactions. In PLDI 2006.
[28]
M. Herlihy, V. Luch-angco, M. Moir, and I. William N. Scherer. Software transactional memory for dynamic-sized data structures. In PODC 2003.
[29]
M. Herlihy, V. Luchangco, and M. Moir. A flexible framework for implementing software transactional memory. In OOPSLA 2006.
[30]
M. Herlihy and J. E. B. Moss. Transactional memory: architectural support for lock-free data structures. In ISCA 1993.
[31]
B. Hindman and D. Grossman. Atomicity via source-to-source translation. In ACM SIGPLAN Workshop on Memory Systems Performance & Correctness 2006.
[32]
R. L. Hudson, B. Saha, A.-R. Adl-Tabatabai, and B. C. Hertzberg. Mcrt-malloc: A scalable transactional memory allocator. In ISMM 2006.
[33]
S. Kumar, M. Chu, C. J. Hughes, P. Kundu, and A. Nguyen. Hybrid transactional memory. In PPoPP 2006.
[34]
H. T. Kung and J. T. Robinson. On optimistic methods for concurrency control. ACM Trans. Database Syst., 6(2), 1981.
[35]
J. Larus and R. Rajwar. Transactional Memory. Morgan & Claypool Publishers, 2006.
[36]
Y. Lev and J.-W. Maessen. Towards a safer interaction with transactional memory by tracking object visibility. In SCOOL 2005.
[37]
J. Manson, J. Baker, A. Cunei, S. Jagannathan, M. Prochazka, B. Xin, and J. Vitek. Preemptible atomic regions for real-time Java. In IEEE Real-Time Systems Symposium 2005.
[38]
J. Manson, W. Pugh, and S. V. Adve. The Java memory model. In POPL 2005.
[39]
V. J. Marathe, W. N. Scherer, and M. L. Scott. Adaptive software transactional memory. In International Symposium on Distributed Computing 2005.
[40]
B. McCloskey, F. Zhou, D. Gay, and E. Brewer. Autolocker: synchronization inference for atomic sections. In POPL 2006.
[41]
A. McDonald, J. Chung, B. D. Carlstrom, C. Cao Minh, H. Chafi, C. Kozyrakis, and K. Olukotun. Architectural semantics for practical transactional memory. In ISCA 2006.
[42]
K. E. Moore, J. Bobba, M. J. Moravan, M. D. Hill, and D. A. Wood. LogTM: Log-based transactional memory. In HPCA 2006.
[43]
M. J. Moravan, J. Bobba, K. E. Moore, L. Yen, M. D. Hill, BLiblit, M. M. Swift, and D. A. Wood. Supporting nested transactional memory in LogTM. In ASPLOS 2006.
[44]
M. Naik, A. Aiken, and J. Whaley. Effective static race detection for Java. In PLDI 2006.
[45]
Y. Ni, V. Menon, A.-R. Adl-Tabatabai, A. L. Hosking, R. L. Hudson, J. E. B. Moss, B. Saha, and T. Shpeisman. Open Nesting in Software Transactional Memory. In PPoPP 2007.
[46]
R. Rajwar, M. Herlihy, and K. Lai. Virtualizing transactional memory. In ISCA 2005.
[47]
M. F. Ringenburg and D. Grossman. AtomCaml: first-class atomicity via rollback. In ICFP 2005.
[48]
E. Ruf. Effective synchronization removal for Java. In PLDI 2000.
[49]
B. Saha, A.-R. Adl-Tabatabai, R. Hudson, C. C. Minh, and B. Hertzberg. McRT-STM: A high performance software transactional memory system for a multi-core runtime. In PPoPP 2006.
[50]
B. Saha, A.-R. Adl-Tabatabai, and Q. Jacobson. Architectural support for software transactional memory. In MICRO 2006.
[51]
N. Shavit and D. Touitou. Software transactional memory. In PODC 1995.
[52]
M. F. Spear, V. J. Marathe, L. Dalessandro, and M. L. Scott. Privatization techniques for software transactional memory. Technical Report 915, University of Rochester, Computer Science Dept., 2007.
[53]
M. F. Spear, V. J. Marathe, W. N. Scherer, and M. L. Scott. Conflict detection and validation strategies for software transactional memory. In DISC 2006.
[54]
Standard Performance Evaluation Corporation. SPEC JVM98 Benchmarks. http://www.spec.org/osg/jvm98.
[55]
Standard Performance Evaluation Corporation. SPEC JBB2000, 2000. See http://www.spec.org/jbb2000.
[56]
RVallée-Rai, L. Hendren, V. Sundaresan, P. Lam, E. Gagnon, and P. Co. Soot - a Java optimization framework. In CASCON 1999.
[57]
C. von Praun and T. R. Gross. Static conflict analysis for multi-threaded object-oriented programs. In PLDI 2003.
[58]
C. Wang, W.-Y. Chen, Y. Wu, B. Saha, and A.-R. Adl-Tabatabai. Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. In CGO 2007.
[59]
A. Welc, S. Jagannathan, and A. L. Hosking. Revocation techniques for Java concurrency. In Concurrency and Computation:Practice and Experience. John Wiley and Sons, 2005.

Cited By

View all
  • (2020)Efficient and scalable cross-ISA virtualization of hardware transactional memoryProceedings of the 18th ACM/IEEE International Symposium on Code Generation and Optimization10.1145/3368826.3377919(107-120)Online publication date: 22-Feb-2020
  • (2015)Low-overhead software transactional memory with progress guarantees and strong semanticsProceedings of the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/2688500.2688510(97-108)Online publication date: 24-Jan-2015
  • (2013)Shared-Memory SynchronizationSynthesis Lectures on Computer Architecture10.2200/S00499ED1V01Y201304CAC0238:2(1-221)Online publication date: 12-Jun-2013
  • Show More Cited By

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM SIGPLAN Notices
ACM SIGPLAN Notices  Volume 42, Issue 6
Proceedings of the 2007 PLDI conference
June 2007
491 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1273442
Issue’s Table of Contents
  • cover image ACM Conferences
    PLDI '07: Proceedings of the 28th ACM SIGPLAN Conference on Programming Language Design and Implementation
    June 2007
    508 pages
    ISBN:9781595936332
    DOI:10.1145/1250734
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 10 June 2007
Published in SIGPLAN Volume 42, Issue 6

Check for updates

Author Tags

  1. code generation
  2. compiler optimizations
  3. escape analysis
  4. isolation
  5. ordering
  6. strong atomicity
  7. transactional memory
  8. virtual machines
  9. weak atomicity

Qualifiers

  • Article

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)14
  • Downloads (Last 6 weeks)3
Reflects downloads up to 15 Oct 2024

Other Metrics

Citations

Cited By

View all
  • (2020)Efficient and scalable cross-ISA virtualization of hardware transactional memoryProceedings of the 18th ACM/IEEE International Symposium on Code Generation and Optimization10.1145/3368826.3377919(107-120)Online publication date: 22-Feb-2020
  • (2015)Low-overhead software transactional memory with progress guarantees and strong semanticsProceedings of the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/2688500.2688510(97-108)Online publication date: 24-Jan-2015
  • (2013)Shared-Memory SynchronizationSynthesis Lectures on Computer Architecture10.2200/S00499ED1V01Y201304CAC0238:2(1-221)Online publication date: 12-Jun-2013
  • (2013)Non-blocking inter-partition communication with wait-free pair transactionsProceedings of the 11th International Workshop on Java Technologies for Real-time and Embedded Systems10.1145/2512989.2512994(58-67)Online publication date: 9-Oct-2013
  • (2013)The Cost of Privatization in Software Transactional MemoryIEEE Transactions on Computers10.1109/TC.2012.15962:12(2531-2543)Online publication date: 1-Dec-2013
  • (2012)Pessimistic software lock-elisionProceedings of the 26th international conference on Distributed Computing10.1007/978-3-642-33651-5_21(297-311)Online publication date: 16-Oct-2012
  • (2012)STM systemsProceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I10.1007/978-3-642-33078-0_23(317-331)Online publication date: 4-Sep-2012
  • (2011)Invited paperProceedings of the 12th international conference on Distributed computing and networking10.5555/1946143.1946144(1-11)Online publication date: 2-Jan-2011
  • (2011)Towards consistency oblivious programmingProceedings of the 15th international conference on Principles of Distributed Systems10.1007/978-3-642-25873-2_6(65-79)Online publication date: 13-Dec-2011
  • (2011)Lowering STM Overhead with Static AnalysisLanguages and Compilers for Parallel Computing10.1007/978-3-642-19595-2_3(31-45)Online publication date: 2011
  • Show More Cited By

View Options

Get Access

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media