Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.1145/1278480.1278483acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
Article

Trusted design in FPGAs

Published: 04 June 2007 Publication History
  • Get Citation Alerts
  • Abstract

    Using FPGAs, a designer can separate the design process from the manufacturing flow. Therefore, the owner of a sensitive design need not expose the design to possible theft and tampering during its manufacture, dramatically simplifying the process of assuring trust in that design. Modern FPGAs include bitstream security features that turn the fielded design trust problem into an information security problem, with well-known cryptographic information security solutions. The generic nature of the FPGA base array allows the validation expense to be amortized over all designs targeted to that base array. Even the task of checking design tools is simplified by using non-destructive checks of the FPGA design.

    References

    [1]
    Jones, L., "Single Event Upset (SEU) Detection and Correction Using Virtex-4 Devices", Xilinx Application Note #714, 2007, http://www.xilinx.com/bvdocs/appnotes/xapp714.pdf
    [2]
    Xilinx Virtex-4 Configuration Users Guide, v1.5, UG 071 2007, http://www.xilinx.com/bvdocs/userguides/ug071.pdf
    [3]
    Thompson, K., "Reflections on Trusting Trust", Communications of the ACM, Vol. 27, No. 8, August 1984, http://www.acm.org/classics/sep95/
    [4]
    Bennett, D., Private communication.
    [5]
    Wollinger, T. and Parr, C. "How Secure are FPGAs in Cryptographic Applications", 13th International Conference on Field Programmable Logic and Applications, FPL 2003, P. Y. K. Cheung, G. A. Constantinides, J. T. de Sousa, eds., LNCS 2887, Springer, 2003.
    [6]
    Feng, J. and Seely, J. A., "Design Security with Waveforms", http://www.altera.com/literature/cp/cp_sdr_design_security.pdf
    [7]
    Lesea, A., "IP Security in FPGAs", Xilinx http://direct.xilinx.com/bvdocs/whitepapers/wp261.pdf
    [8]
    Teliknepalli, A., "Is Your FPGA Design Secure?", XCell Journal, 2003, http://www.xilinx.com/publications/xcellonline/xcell_47/xc_pdf/xc_secure47.pdf
    [9]
    Baetoniu, C. and Sheth S., "FPGA IFF Copy Protection Using Dallas Semiconductor/Maxim DS2432 Secure EEPROMs", Xilinx Application Note XAPP 780, Xilinx 2005.
    [10]
    Trimberger, S., FPGA Technology, Kluwer Academic Press, 1994.
    [11]
    Trimberger, S. "Method and apparatus for protecting proprietary configuration data for programmable logic devices", US Patent 6654889, 2003.
    [12]
    Schneier, B., Applied Cryptography Second Edition, Wiley, 1996.

    Cited By

    View all
    • (2023)Ring Oscillator PUF and Blockchain: A Way of Securing Post Fabrication FPGA Supply Chain2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS57524.2023.10405953(35-39)Online publication date: 6-Aug-2023
    • (2021)A Survey on Security Concerns and Their Actual Solutions for using FPGAs in Cloud Computing2021 IEEE Latin American Conference on Computational Intelligence (LA-CCI)10.1109/LA-CCI48322.2021.9769794(1-6)Online publication date: 2-Nov-2021
    • (2020)Examining Police Agencies’ Dialogic Accounting Practices in Facebook ConversationsDigital Government: Research and Practice10.1145/33720221:2(1-17)Online publication date: 9-Apr-2020
    • Show More Cited By

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    DAC '07: Proceedings of the 44th annual Design Automation Conference
    June 2007
    1016 pages
    ISBN:9781595936271
    DOI:10.1145/1278480
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 04 June 2007

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. FPGA
    2. cryptography
    3. trusted design

    Qualifiers

    • Article

    Conference

    DAC07
    Sponsor:

    Acceptance Rates

    DAC '07 Paper Acceptance Rate 152 of 659 submissions, 23%;
    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

    Upcoming Conference

    DAC '25
    62nd ACM/IEEE Design Automation Conference
    June 22 - 26, 2025
    San Francisco , CA , USA

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)15
    • Downloads (Last 6 weeks)2

    Other Metrics

    Citations

    Cited By

    View all
    • (2023)Ring Oscillator PUF and Blockchain: A Way of Securing Post Fabrication FPGA Supply Chain2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS57524.2023.10405953(35-39)Online publication date: 6-Aug-2023
    • (2021)A Survey on Security Concerns and Their Actual Solutions for using FPGAs in Cloud Computing2021 IEEE Latin American Conference on Computational Intelligence (LA-CCI)10.1109/LA-CCI48322.2021.9769794(1-6)Online publication date: 2-Nov-2021
    • (2020)Examining Police Agencies’ Dialogic Accounting Practices in Facebook ConversationsDigital Government: Research and Practice10.1145/33720221:2(1-17)Online publication date: 9-Apr-2020
    • (2020)Participating in the Digital SocietyDigital Government: Research and Practice10.1145/33618651:2(1-13)Online publication date: 9-Apr-2020
    • (2020)Analyzing and Visualizing Government-Citizen Interactions on Twitter to Support Public Policy-makingDigital Government: Research and Practice10.1145/33600011:2(1-20)Online publication date: 9-Apr-2020
    • (2019)Smart-Hop Arbitration Request PropagationACM Transactions on Design Automation of Electronic Systems10.1145/335623524:6(1-25)Online publication date: 14-Oct-2019
    • (2019)JAMS-SGACM Transactions on Design Automation of Electronic Systems10.1145/335539224:6(1-31)Online publication date: 17-Sep-2019
    • (2019)Cut Optimization for Redundant Via Insertion in Self-Aligned Double PatterningACM Transactions on Design Automation of Electronic Systems10.1145/335539124:6(1-21)Online publication date: 9-Sep-2019
    • (2019)Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training MethodACM Transactions on Design Automation of Electronic Systems10.1145/334223924:6(1-25)Online publication date: 16-Aug-2019
    • (2019)Recent Attacks and Defenses on FPGA-based SystemsACM Transactions on Reconfigurable Technology and Systems10.1145/334055712:3(1-24)Online publication date: 21-Aug-2019
    • Show More Cited By

    View Options

    Get Access

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media