Article

DDBDD: delay-driven BDD synthesis for FPGAs

Authors:

Martin D. F. WongAuthors Info & Claims

DAC '07: Proceedings of the 44th annual Design Automation Conference

Pages 910 - 915

https://doi.org/10.1145/1278480.1278705

Published: 04 June 2007 Publication History

Abstract

In this paper, we target FPGA performance optimization using a novel BDD (binary decision graph)-based synthesis approach. Most of previous works have focused on BDD size reduction during logic synthesis. In this work, we concentrate on delay reduction and conclude that there is a large optimization margin through BDD synthesis for FPGA performance optimization. Our contributions are threefold: (1) we propose a gain-based clustering and partial collapsing algorithm to prepare the initial design for BDD synthesis for better delay; (2) we use a technique named linear expansion for BDD decomposition, which in turn enables a dynamic programming algorithm to efficiently search through the optimization space for the BDD of each node in the clustered circuit; (3) we consider special decomposition scenarios coupled with linear expansion for further improvement on quality of results. Experimental results show that we can achieve a 95% gain in terms of network depths, and a 20% gain in terms of routed delay, with a 22% area overhead on average compared to a previous state-of-art BDD-based FPGA synthesis tool, BDS-pga.

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{Online}. Available: http://www.ecs.umass.edu/ece/tessier/rcg/bds-pga-2.0/results_bds-pga.html.

Cited By

Kubica MCzerwinski R(2024)Performance Testing of the Triple Modular Redundancy Mitigation Circuit Test Environment Implementation in Field Programmable Gate Array StructuresApplied Sciences10.3390/app1419860414:19(8604)Online publication date: 24-Sep-2024
https://doi.org/10.3390/app14198604
Opara AKubica MKania D(2023)Decomposition Approaches for Power ReductionIEEE Access10.1109/ACCESS.2023.326097011(29417-29429)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3260970
Häner TSoeken M(2022)Lowering the T-depth of Quantum Circuits via Logic Network OptimizationACM Transactions on Quantum Computing10.1145/35013343:2(1-15)Online publication date: 4-Mar-2022
https://dl.acm.org/doi/10.1145/3501334
Show More Cited By

Index Terms

DDBDD: delay-driven BDD synthesis for FPGAs
1. Applied computing
  1. Physical sciences and engineering
    1. Engineering

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Published In

cover image ACM Conferences

DAC '07: Proceedings of the 44th annual Design Automation Conference

June 2007

1016 pages

ISBN:9781595936271

DOI:10.1145/1278480

General Chair:
Steven P. Levitan
Univ. of Pittsburgh, Pittsburgh, PA

Copyright © 2007 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation

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Association for Computing Machinery

New York, NY, United States

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Published: 04 June 2007

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DAC07: The 44th Annual Design Automation Conference 2007

June 4 - 8, 2007

California, San Diego

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DAC '07 Paper Acceptance Rate 152 of 659 submissions, 23%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Kubica MCzerwinski R(2024)Performance Testing of the Triple Modular Redundancy Mitigation Circuit Test Environment Implementation in Field Programmable Gate Array StructuresApplied Sciences10.3390/app1419860414:19(8604)Online publication date: 24-Sep-2024
https://doi.org/10.3390/app14198604
Opara AKubica MKania D(2023)Decomposition Approaches for Power ReductionIEEE Access10.1109/ACCESS.2023.326097011(29417-29429)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3260970
Häner TSoeken M(2022)Lowering the T-depth of Quantum Circuits via Logic Network OptimizationACM Transactions on Quantum Computing10.1145/35013343:2(1-15)Online publication date: 4-Mar-2022
https://dl.acm.org/doi/10.1145/3501334
Kubica MOpara AKania DKubica MOpara AKania D(2020)Binary Decision DiagramsTechnology Mapping for LUT-Based FPGA10.1007/978-3-030-60488-2_3(25-37)Online publication date: 8-Nov-2020
https://doi.org/10.1007/978-3-030-60488-2_3
Kubica MOpara AKania DKubica MOpara AKania D(2020)Results of ExperimentsTechnology Mapping for LUT-Based FPGA10.1007/978-3-030-60488-2_15(159-200)Online publication date: 8-Nov-2020
https://doi.org/10.1007/978-3-030-60488-2_15
Opara AKubica MKania D(2019)Methods of improving time efficiency of decomposition dedicated at FPGA structures and using BDD in the process of Cyber-Physical SynthesisIEEE Access10.1109/ACCESS.2019.2898230(1-1)Online publication date: 2019
https://doi.org/10.1109/ACCESS.2019.2898230
Kubica MOpara AKania D(2017)Logic synthesis for FPGAs based on cutting of BDDMicroprocessors & Microsystems10.1016/j.micpro.2017.06.01052:C(173-187)Online publication date: 1-Jul-2017
https://dl.acm.org/doi/10.1016/j.micpro.2017.06.010
Mishchenko ABrayton RJang SKravets VPhillips JHu AGraeb H(2011)Delay optimization using SOP balancingProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132420(375-382)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.5555/2132325.2132420
Mishchenko ABrayton RJang SKravets V(2011)Delay optimization using SOP balancingProceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design10.1109/ICCAD.2011.6105357(375-382)Online publication date: 7-Nov-2011
https://dl.acm.org/doi/10.1109/ICCAD.2011.6105357
Mishchenko ABrayton RJang SCheung PWawrzynek J(2010)Global delay optimization using structural choicesProceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1723112.1723144(181-184)Online publication date: 21-Feb-2010
https://dl.acm.org/doi/10.1145/1723112.1723144

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