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A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications

Published: 01 August 2008 Publication History

Abstract

In this article, a novel FTL (flash translation layer) architecture is proposed for NAND flash-based applications such as MP3 players, DSCs (digital still cameras) and SSDs (solid-state drives). Although the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, efficient algorithms of an FTL have a significant impact on performance as well as the lifetime. After the dominant parameters that affect the performance and endurance are categorized, the design space of the FTL architecture is explored based on a diverse workload analysis. With the proposed FTL architectural framework, it is possible to decide which configuration of FTL mapping parameters yields the best performance, depending on the differing characteristics of various NAND flash-based applications.

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Cited By

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  • (2024)A Detailed Analysis of Issues with Solid-State DevicesRobotics and Automation in Industry 4.010.2174/9789815223491124010013(168-188)Online publication date: 13-Oct-2024
  • (2024)Space-efficient FTL for Mobile Storage via Tiny Neural NetsProceedings of the 17th ACM International Systems and Storage Conference10.1145/3688351.3689157(146-161)Online publication date: 16-Sep-2024
  • (2024)eZNS: Elastic Zoned Namespace for Enhanced Performance Isolation and Device UtilizationACM Transactions on Storage10.1145/365371620:3(1-41)Online publication date: 12-Apr-2024
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Published In

cover image ACM Transactions on Embedded Computing Systems
ACM Transactions on Embedded Computing Systems  Volume 7, Issue 4
July 2008
264 pages
ISSN:1539-9087
EISSN:1558-3465
DOI:10.1145/1376804
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 August 2008
Accepted: 01 December 2007
Received: 01 September 2007
Published in TECS Volume 7, Issue 4

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Author Tags

  1. FTL
  2. Flash memory
  3. performance analysis
  4. reconfigurable architecture

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Cited By

View all
  • (2024)A Detailed Analysis of Issues with Solid-State DevicesRobotics and Automation in Industry 4.010.2174/9789815223491124010013(168-188)Online publication date: 13-Oct-2024
  • (2024)Space-efficient FTL for Mobile Storage via Tiny Neural NetsProceedings of the 17th ACM International Systems and Storage Conference10.1145/3688351.3689157(146-161)Online publication date: 16-Sep-2024
  • (2024)eZNS: Elastic Zoned Namespace for Enhanced Performance Isolation and Device UtilizationACM Transactions on Storage10.1145/365371620:3(1-41)Online publication date: 12-Apr-2024
  • (2023)LeaFTL: A Learning-Based Flash Translation Layer for Solid-State DrivesProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3575693.3575744(442-456)Online publication date: 27-Jan-2023
  • (2023)GUI-Based NAND Flash Memory and Functional Implementation of Block Level Address Translation SchemeArtificial Intelligence and Sustainable Computing10.1007/978-981-99-1431-9_45(569-578)Online publication date: 24-Sep-2023
  • (2022)Efficient Garbage Collection Algorithm for Low Latency SSDElectronics10.3390/electronics1107108411:7(1084)Online publication date: 30-Mar-2022
  • (2022)Pattern-Based Prefetching with Adaptive Cache Management Inside of Solid-State DrivesACM Transactions on Storage10.1145/347439318:1(1-25)Online publication date: 29-Jan-2022
  • (2021)Performance Modeling and Practical Use Cases for Black-Box SSDsACM Transactions on Storage10.1145/344002217:2(1-38)Online publication date: 8-Jun-2021
  • (2021)HCFTL: A Locality-Aware Flash Translation Layer for Efficient Address TranslationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.311214241:8(2477-2489)Online publication date: 13-Sep-2021
  • (2021)Internal Task-Aware Command Scheduling to Improve Read Performance of Embedded Flash Storage SystemsIEEE Access10.1109/ACCESS.2021.30795209(71638-71650)Online publication date: 2021
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