research-article

Future scaling of processor-memory interfaces

Authors:

Norman P. Jouppi,

Christos Kozyrakis,

Jacob Leverich,

Robert S. SchreiberAuthors Info & Claims

SC '09: Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis

Article No.: 42, Pages 1 - 12

https://doi.org/10.1145/1654059.1654102

Published: 14 November 2009 Publication History

Abstract

Continuous evolution in process technology brings energy-efficiency and reliability challenges, which are harder for memory system designs since chip multiprocessors demand high bandwidth and capacity, global wires improve slowly, and more cells are susceptible to hard and soft errors. Recently, there are proposals aiming at better main-memory energy efficiency by dividing a memory rank into subsets.

We holistically assess the effectiveness of rank subsetting in the context of system-wide performance, energy-efficiency, and reliability perspectives. We identify the impact of rank subsetting on memory power and processor performance analytically, then verify the analyses by simulating a chipmultiprocessor system using multithreaded and consolidated workloads. We extend the design of Multicore DIMM, one proposal embodying rank subsetting, for high-reliability systems and show that compared with conventional chipkill approaches, it can lead to much higher system-level energy efficiency and performance at the cost of additional DRAM devices.

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Cited By

Kim MWi MPark JKo SChoi JNam HKim NAhn JLee E(2023)How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAMProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623777(986-1001)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3623777
Li YSun DLee B(2020)Dynamic Colocation Policies with Reinforcement LearningACM Transactions on Architecture and Code Optimization10.1145/337571417:1(1-25)Online publication date: 4-Mar-2020
https://dl.acm.org/doi/10.1145/3375714
Balasubramonian R(2019)Innovations in the Memory SystemSynthesis Lectures on Computer Architecture10.2200/S00933ED1V01Y201906CAC04814:2(1-151)Online publication date: 10-Sep-2019
https://doi.org/10.2200/S00933ED1V01Y201906CAC048
Show More Cited By

Index Terms

Future scaling of processor-memory interfaces
1. Hardware
  1. Integrated circuits
    1. Interconnect
    2. Semiconductor memory
  2. Robustness

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cover image ACM Conferences

SC '09: Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis

November 2009

778 pages

ISBN:9781605587448

DOI:10.1145/1654059

Conference Chair:
Wilfred Pinfold

Copyright © 2009 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 14 November 2009

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SC '09: International Conference for High Performance Computing, Networking, Storage and Analysis

November 14 - 20, 2009

Oregon, Portland

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SC '09 Paper Acceptance Rate 59 of 261 submissions, 23%;

Overall Acceptance Rate 1,516 of 6,373 submissions, 24%

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Cited By

Kim MWi MPark JKo SChoi JNam HKim NAhn JLee E(2023)How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAMProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623777(986-1001)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3623777
Li YSun DLee B(2020)Dynamic Colocation Policies with Reinforcement LearningACM Transactions on Architecture and Code Optimization10.1145/337571417:1(1-25)Online publication date: 4-Mar-2020
https://dl.acm.org/doi/10.1145/3375714
Balasubramonian R(2019)Innovations in the Memory SystemSynthesis Lectures on Computer Architecture10.2200/S00933ED1V01Y201906CAC04814:2(1-151)Online publication date: 10-Sep-2019
https://doi.org/10.2200/S00933ED1V01Y201906CAC048
Ghose SLi THajinazar NCali DMutlu O(2019)Demystifying Complex Workload-DRAM InteractionsProceedings of the ACM on Measurement and Analysis of Computing Systems10.1145/33667083:3(1-50)Online publication date: 17-Dec-2019
https://dl.acm.org/doi/10.1145/3366708
Cojocar LRazavi KGiuffrida CBos H(2019)Exploiting Correcting Codes: On the Effectiveness of ECC Memory Against Rowhammer Attacks2019 IEEE Symposium on Security and Privacy (SP)10.1109/SP.2019.00089(55-71)Online publication date: May-2019
https://doi.org/10.1109/SP.2019.00089
Jaulmes LMoreto MValero MCasas M(2019)A Vulnerability Factor for ECC-protected Memory2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS.2019.8854397(176-181)Online publication date: Jul-2019
https://doi.org/10.1109/IOLTS.2019.8854397
Young VKariyappa SQureshi M(2019)Enabling Transparent Memory-Compression for Commodity Memory Systems2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2019.00010(570-581)Online publication date: Feb-2019
https://doi.org/10.1109/HPCA.2019.00010
Zhang ZHuang LHuang RXu WKatz D(2019)Quantifying the Impact of Memory Errors in Deep Learning2019 IEEE International Conference on Cluster Computing (CLUSTER)10.1109/CLUSTER.2019.8890989(1-12)Online publication date: Sep-2019
https://doi.org/10.1109/CLUSTER.2019.8890989
Akin BChou CPark JHughes CAgarwal RJacob B(2018)Dynamic fine-grained sparse memory accessesProceedings of the International Symposium on Memory Systems10.1145/3240302.3240416(85-97)Online publication date: 1-Oct-2018
https://dl.acm.org/doi/10.1145/3240302.3240416
Vuong AShafiee ATaassori MBalasubramonian RSzefer JShi WLee R(2018)An MLP-aware leakage-free memory controllerProceedings of the 7th International Workshop on Hardware and Architectural Support for Security and Privacy10.1145/3214292.3214296(1-7)Online publication date: 2-Jun-2018
https://dl.acm.org/doi/10.1145/3214292.3214296
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