research-article

Virtual channels vs. multiple physical networks: a comparative analysis

Authors:

Young Jin Yoon,

Michele Petracca,

Luca CarloniAuthors Info & Claims

DAC '10: Proceedings of the 47th Design Automation Conference

Pages 162 - 165

https://doi.org/10.1145/1837274.1837315

Published: 13 June 2010 Publication History

Abstract

Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoid deadlock and optimize the bandwidth of the physical channels in exchange for a more complex design of the routers. Another, possibly alternative, approach is to build multiple parallel physical networks (multiplanes) with smaller channels and simpler router organizations. We present a comparative analysis of these two approaches based on analytical models and on a comprehensive set of experimental results including both synthesized hardware implementations and system-level simulations.

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Cited By

LIU XGAO YHE YYUE XJIANG HWANG X(2023)Hybrid, Asymmetric and Reconfigurable Input Unit Designs for Energy-Efficient On-Chip NetworksIEICE Transactions on Electronics10.1587/transele.2022CTP0005E106.C:10(570-579)Online publication date: 1-Oct-2023
https://doi.org/10.1587/transele.2022CTP0005
Tombesi GZuckerman JMantovani PGiri DSantos MJia TBrooks DWei GCarloni L(2023)SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCsIEEE Design & Test10.1109/MDAT.2023.331035540:6(64-75)Online publication date: Dec-2023
https://doi.org/10.1109/MDAT.2023.3310355
Yadav SLaxmi VKapoor HGaur MKumar A(2023)Adaptive distribution of control messages for improving bandwidth utilization in multiple NoCThe Journal of Supercomputing10.1007/s11227-023-05208-079:15(17208-17246)Online publication date: 7-May-2023
https://doi.org/10.1007/s11227-023-05208-0
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Index Terms

Virtual channels vs. multiple physical networks: a comparative analysis
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures

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cover image ACM Conferences

DAC '10: Proceedings of the 47th Design Automation Conference

June 2010

1036 pages

ISBN:9781450300025

DOI:10.1145/1837274

General Chair:
Sachin Sapatnekar
Univ. of Minnesota, Minneapolis, MN

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 13 June 2010

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DAC '10: The 47th Annual Design Automation Conference 2010

June 13 - 18, 2010

California, Anaheim

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

LIU XGAO YHE YYUE XJIANG HWANG X(2023)Hybrid, Asymmetric and Reconfigurable Input Unit Designs for Energy-Efficient On-Chip NetworksIEICE Transactions on Electronics10.1587/transele.2022CTP0005E106.C:10(570-579)Online publication date: 1-Oct-2023
https://doi.org/10.1587/transele.2022CTP0005
Tombesi GZuckerman JMantovani PGiri DSantos MJia TBrooks DWei GCarloni L(2023)SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCsIEEE Design & Test10.1109/MDAT.2023.331035540:6(64-75)Online publication date: Dec-2023
https://doi.org/10.1109/MDAT.2023.3310355
Yadav SLaxmi VKapoor HGaur MKumar A(2023)Adaptive distribution of control messages for improving bandwidth utilization in multiple NoCThe Journal of Supercomputing10.1007/s11227-023-05208-079:15(17208-17246)Online publication date: 7-May-2023
https://doi.org/10.1007/s11227-023-05208-0
Deb DM.K RJose J(2022)FlitZip: Effective Packet Compression for NoC in MultiProcessor System-on-ChipIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2021.309031533:1(117-128)Online publication date: 1-Jan-2022
https://doi.org/10.1109/TPDS.2021.3090315
Zhou WOuyang YLu YLiang H(2022)A router architecture with dual input and dual output channels for Networks-on-ChipMicroprocessors & Microsystems10.1016/j.micpro.2022.10446490:COnline publication date: 1-Apr-2022
https://dl.acm.org/doi/10.1016/j.micpro.2022.104464
Moudi MOthman M(2021)A survey on emerging issues in interconnection networksInternational Journal of Internet Technology and Secured Transactions10.1504/ijitst.2021.11351211:2(131-159)Online publication date: 1-Jan-2021
https://dl.acm.org/doi/10.1504/ijitst.2021.113512
Gangwar ASreedharan RPrasad AAgarwal NGade S(2021)Topology Agnostic Virtual Channel Assignment and Protocol Level Deadlock Avoidance in a Network-on-Chip2021 58th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC18074.2021.9586196(61-66)Online publication date: 5-Dec-2021
https://doi.org/10.1109/DAC18074.2021.9586196
Gangwar AAgarwal NSreedharan RPrasad AGade SXu ZXie Y(2020)Automated synthesis of custom networks-on-chip for real world applicationsProceedings of the 39th International Conference on Computer-Aided Design10.1145/3400302.3415656(1-9)Online publication date: 2-Nov-2020
https://dl.acm.org/doi/10.1145/3400302.3415656
Fasiku ARusli SMarsono M(2020)Characterization of Subnets, Virtual Channel and Routing on Wireless Network-on-Chip Performance2020 IEEE Student Conference on Research and Development (SCOReD)10.1109/SCOReD50371.2020.9250968(117-121)Online publication date: 27-Sep-2020
https://doi.org/10.1109/SCOReD50371.2020.9250968
Punniyamurthy KGerstlauer A(2020)Off-Chip Congestion Management for GPU-based Non-Uniform Processing-in-Memory Networks2020 28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)10.1109/PDP50117.2020.00050(282-289)Online publication date: Mar-2020
https://doi.org/10.1109/PDP50117.2020.00050
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