research-article

Wakeup synthesis and its buffered tree construction for power gating circuit designs

Authors:

Seungwhun Paik,

Youngsoo ShinAuthors Info & Claims

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

Pages 413 - 418

https://doi.org/10.1145/1840845.1840936

Published: 18 August 2010 Publication History

Abstract

We propose a wakeup synthesis that determines the turn-on time and signal slew of each switch cell; the goal is to minimize wakeup delay while rush current is kept below the maximum value that is allowed. The determined turn-on time and signal slew are implemented using a buffered tree. The wakeup synthesis and buffered tree construction are integrated into a design flow that receives a netlist of power gating circuit as an input and produces a layout of netlist with wakeup network embedded. Experiments demonstrate that the wakeup delay is reduced by 43% on average compared with 2-pass turn-on.

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Cited By

Chen YLin IChiu KLiu C(2021)An efficient NBTI-aware wake-up strategy: Concept, design, and manipulationIntegration10.1016/j.vlsi.2021.04.00380(60-71)Online publication date: Sep-2021
https://doi.org/10.1016/j.vlsi.2021.04.003
Shyu YLin JLin CHuang CChang S(2016)An Efficient and Effective Methodology to Control Turn-On Sequence of Power Switches for Power Gating DesignsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.252391635:10(1730-1743)Online publication date: 1-Oct-2016
https://dl.acm.org/doi/10.1109/TCAD.2016.2523916
Jiao HKursun V(2013)Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS CircuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2012.219011621:3(533-545)Online publication date: Mar-2013
https://doi.org/10.1109/TVLSI.2012.2190116
Show More Cited By

Index Terms

Wakeup synthesis and its buffered tree construction for power gating circuit designs
1. Hardware
  1. Very large scale integration design

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cover image ACM Conferences

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

August 2010

458 pages

ISBN:9781450301466

DOI:10.1145/1840845

General Chairs:
Vojin Oklobdzija
University of Texas, Dallas
,
Barry Pangle
Mentor Graphics
,
Naehyuck Chang
Seoul National University
,
Program Chairs:
Naresh Shanbhag
University of Illinois at Urbana-Champaign
,
Chris H. Kim
University of Minnesota

Copyright © 2010 ACM.

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Published: 18 August 2010

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ISLPED'10: International Symposium on Low Power Electronics and Design

August 18 - 20, 2010

Texas, Austin, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

Chen YLin IChiu KLiu C(2021)An efficient NBTI-aware wake-up strategy: Concept, design, and manipulationIntegration10.1016/j.vlsi.2021.04.00380(60-71)Online publication date: Sep-2021
https://doi.org/10.1016/j.vlsi.2021.04.003
Shyu YLin JLin CHuang CChang S(2016)An Efficient and Effective Methodology to Control Turn-On Sequence of Power Switches for Power Gating DesignsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.252391635:10(1730-1743)Online publication date: 1-Oct-2016
https://dl.acm.org/doi/10.1109/TCAD.2016.2523916
Jiao HKursun V(2013)Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS CircuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2012.219011621:3(533-545)Online publication date: Mar-2013
https://doi.org/10.1109/TVLSI.2012.2190116
Jiao HKursun V(2011)Sleep signal slew rate modulation for mode transition noise suppression in ground gated integrated circuits2011 IEEE International SOC Conference10.1109/SOCC.2011.6085093(365-370)Online publication date: Sep-2011
https://doi.org/10.1109/SOCC.2011.6085093

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