research-article

Towards a synthesis semantics for systemC channels

Authors:

Frank Oppenheimer,

Achim Rettberg,

Wolfgang NebelAuthors Info & Claims

CODES/ISSS '10: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

Pages 163 - 172

https://doi.org/10.1145/1878961.1878990

Published: 24 October 2010 Publication History

Abstract

In this paper we propose a synthesis semantics for systemC^TM channels, which contribute to a clear separation between computation (algorithm) and communication, whereas communication related parts are modelled through either primitive or hierarchical channels. We present a synthesisable replacement for systemC primitive channels that allows deterministic access scheduling and user-constrained refinement for HW/HW and HW/SW communication. We demonstrate the feasibility of our approach through synthesis and exploration of a communication intensive packet switch design under consideration of different configurations and communication refinements

References

[1]

A. Rose, S. Swan, J. Pierce and J.-M. Fernandez. Transaction Level Modeling in SystemC. Whitepaper, OSCI TLM Working Group, 2005.

[2]

S. Abdi, D. Shin, and D. Gajski. Automatic communication refinement for system level design. In DAC '03: Proceedings of the 40th conference on Design automation, pages 300--305, New York, NY, USA, 2003. ACM.

Digital Library

[3]

Arvind, R. S. Nikhil, D. L. Rosenband, and N. Dave. High-level synthesis: an essential ingredient for designing complex asics. In ICCAD '04: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, pages 775--782, Washington, DC, USA, 2004. IEEE Computer Society.

Digital Library

[4]

Arvind and X. Shen. Using term rewriting systems to design and verify processors. Micro, IEEE, 19(3):36--46, may/jun 1999.

Digital Library

[5]

G. Borriello. A New Interface Specification Methodology and its Application to Transducer Synthesis. PhD thesis, EECS Department, University of California, Berkeley, May 1988.

Digital Library

[6]

Cadence - C-to-Silicon Compiler. www.cadence.com.

[7]

L. Cai and D. Gajski. Transaction level modeling: an overview. In CODES+ISSS '03: Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, pages 19--24, New York, NY, USA, 2003. ACM.

Digital Library

[8]

Mentor Graphics - CatapultC. www.mentor.com.

[9]

Forte Design Systems - Cynthesizer. www.forteds.com.

[10]

D. D. Gajski, J. Zhu, R. Dömer, A. Gerstlauer, and S. Zhao. SpecC: Specification Language and Methodology. Springer, 2000.

[11]

E. Grimpe. Performance Optimising Hardware Synthesis of Shared Objects. PhD thesis, Universität Oldenburg, 2005.

[12]

E. Grimpe and F. Oppenheimer. Extending the SystemC Synthesis Subset by Object Oriented Features. In CODES+ISSS 2003. CODES + ISSS 2003, Marriott Hotel, Newport Beach, California, USA, October 2003.

Digital Library

[13]

O. S. W. Group. SystemC Synthesisable Subset. Technical Report Draft 1.3, Open SystemC Initiative, August 2009.

[14]

K. Grüttner, C. Brunzema, C. Grabbe, T. Schubert, and F. Oppenheimer. OSSS-Channels: Modelling and Synthesis of Communication With SystemC. In Proceedings: Forum on Specification & Design Languages, September 2006.

[15]

K. Grüttner, C. Grabbe, F. Oppenheimer, and W. Nebel. Object Oriented Design and Synthesis of Communication in Hardware-/Software Systems with OSSS. In Proceedings of the SASIMI 2007, October 2007.

[16]

C. A. R. Hoare. Monitors: an operating system structuring concept. Commun. ACM, 17(10):549--557, 1974.

Digital Library

[17]

IBM. On-Chip Peripheral Bus Architecture Specifications, Version 2.1, SA-14-2528-02.

[18]

ICODES project. http://icodes.offis.de.

[19]

IEEE. IEEE 1666TM Open SystemC Language Reference Manual, 2006.

[20]

S. Ihmor. Modeling and automated synthesis of reconfigurable interfaces. PhD thesis, Fakultät für Elektrotechnik, Informatik und Mathematik, Institut für Informatik, Universität Paderborn, January 2006.

[21]

S. Narayan and D. D. Gajski. Protocol generation for communication channels. In DAC '94: Proceedings of the 31st annual conference on Design automation, pages 547--551, New York, NY, USA, 1994. ACM.

Digital Library

[22]

M. Radetzki. Synthesis of Digital Circuits from Object-Oriented Specifications. PhD thesis, Carl v. Ossietzky Universität Oldenburg, April 2000.

[23]

J. A. Rowson and A. Sangiovanni-Vincentelli. Interface-based design. In DAC '97: Proceedings of the 34th annual conference on Design automation, pages 178--183, New York, NY, USA, 1997. ACM.

Digital Library

[24]

C. Schulz-Key, M. Winterholer, T. Schweizer, T. Kuhn, and W. Rosenstiel. Object-oriented modeling and synthesis of systemc specifications. In ASP-DAC '04: Proceedings of the 2004 conference on Asia South Pacific design automation, pages 238--243, Piscataway, NJ, USA, 2004. IEEE Press.

Digital Library

[25]

D. Shin and D. D. Gajski. Interface Synthesis from Protocol Specification. Technical report, Technical Report CECS-02-13, Department of Information and Computer Science University of California, Irvine, April 2005.

[26]

D. Shin, A. Gerstlauer, R. Dömer, and D. D. Gajski. Automatic Generation of Communication Architectures. Springer Science+Business Media, New York, NY, ISBN 0-387-27557-6, September 2005.

[27]

R. Siegmund and D. Müller. Systemcsv - an extension of systemc for mixed multi-level communication modeling and interface-based system design. In DATE '01: Proceedings of the conference on Design, automation and test in Europe, pages 26--33, Piscataway, NJ, USA, 2001. IEEE Press.

Digital Library

[28]

R. Siegmund and D. Müller. Automatic synthesis of communication controller hardware from protocol specifications. IEEE Design and Test of Computers, 19(4):84--95, 2002.

Digital Library

[29]

R. Siegmund and D. Müller. A novel synthesis technique for communication controller hardware from declarative data communication protocol specifications. In DAC '02: Proceedings of the 39th conference on Design automation, pages 602--607, New York, NY, USA, 2002. ACM.

Digital Library

[30]

SystemCrafter. www.systemcrafter.com.

[31]

Homepage of the OSSS and FOSSY Project. http://www.system-synthesis.org.

Cited By

Mück TFröhlich A(2018)A metaprogrammed C++ framework for hardware/software component integration and communicationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2014.09.00260:10(816-827)Online publication date: 29-Dec-2018
https://dl.acm.org/doi/10.1016/j.sysarc.2014.09.002
Ittershagen PGrüttner KNebel W(2016)A Task-Level Monitoring Framework for Multi-Processor PlatformsProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906373(145-152)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906373
Muck TFrohlich A(2014)Toward Unified Design of Hardware and Software Components Using ${\bf C} \!+ \! + $ IEEE Transactions on Computers10.1109/TC.2013.15963:11(2880-2893)Online publication date: Nov-2014
https://doi.org/10.1109/TC.2013.159
Show More Cited By

Index Terms

Towards a synthesis semantics for systemC channels
1. Hardware

Recommendations

Design, synthesis and verification of a smart imaging core using SystemC

In this paper the development of a smart imaging core following a SystemC-based design flow is presented. The smart imaging core integrates an ARM processor and two specific hardware blocks for image processing: a smart imaging coprocessor and a motion ...
Co-simulation framework of SystemC SoC virtual prototype and custom logic (abstract only)
FPGA '13: Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays

To address the increasing demand of System-on-Chip (SoC) for high performance applications and IP programmability, specialized SoC with custom logic is developed in a single chip or multi-chip system. Like any other SoC platforms, early software ...
Extending the SystemC synthesis subset by object-oriented features
CODES+ISSS '03: Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

In this article we present an approach to object-oriented hardware design and synthesis based on SystemC. We will give an introduction to an extended SystemC synthesis subset which we propose, and, in particular, its object-oriented features. We will ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

CODES/ISSS '10: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

October 2010

348 pages

ISBN:9781605589053

DOI:10.1145/1878961

Program Chairs:
Tony Givargis
University of California, Irvine, CA
,
Adam Donlin
Xilinx, USA

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

In-Cooperation

CEDA
IEEE CAS
IEEE CS

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 24 October 2010

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Conference

ESWeek '10

Sponsor:

ESWeek '10: Sixth Embedded Systems Week

October 24 - 29, 2010

Arizona, Scottsdale, USA

Acceptance Rates

Overall Acceptance Rate 280 of 864 submissions, 32%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

4
Total Citations
View Citations
133
Total Downloads

Downloads (Last 12 months)3
Downloads (Last 6 weeks)0

Reflects downloads up to 11 Jan 2025

Other Metrics

View Author Metrics

Citations

Cited By

Mück TFröhlich A(2018)A metaprogrammed C++ framework for hardware/software component integration and communicationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2014.09.00260:10(816-827)Online publication date: 29-Dec-2018
https://dl.acm.org/doi/10.1016/j.sysarc.2014.09.002
Ittershagen PGrüttner KNebel W(2016)A Task-Level Monitoring Framework for Multi-Processor PlatformsProceedings of the 19th International Workshop on Software and Compilers for Embedded Systems10.1145/2906363.2906373(145-152)Online publication date: 23-May-2016
https://dl.acm.org/doi/10.1145/2906363.2906373
Muck TFrohlich A(2014)Toward Unified Design of Hardware and Software Components Using ${\bf C} \!+ \! + $ IEEE Transactions on Computers10.1109/TC.2013.15963:11(2880-2893)Online publication date: Nov-2014
https://doi.org/10.1109/TC.2013.159
Muck TFrohlich A(2013)Seamless integration of HW/SW components in a HLS-based SoC design environment2013 International Symposium on Rapid System Prototyping (RSP)10.1109/RSP.2013.6683966(109-115)Online publication date: Oct-2013
https://doi.org/10.1109/RSP.2013.6683966

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Table of Contents