Article

Automatic communication refinement for system level design

Authors:

Samar Abdi,

Dongwan Shin,

Daniel GajskiAuthors Info & Claims

DAC '03: Proceedings of the 40th annual Design Automation Conference

Pages 300 - 305

https://doi.org/10.1145/775832.775911

Published: 02 June 2003 Publication History

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Abstract

This paper presents a methodology and algorithms for automatic communication refinement. The communication refinement task in system-level synthesis transforms abstract data-transfer between components to its actual bus level implementation. The input model of the communication refinement is a set of concurrently executing components, communicating with each other through abstract communication channels. The refined model reflects the actual communication architecture. Choosing a good communication architecture in system level designs requires sufficient exploration through evaluation of various architectures. However, this would not be possible with manually refining the system model for each communication architecture. For one, manual refinement is tedious and error-prone. Secondly, it wastes substantial amount of precious designer time. We solve this problem with automatic model refinement. We also present a set of experimental results to demonstrate how the proposed approach works on a typical system level design.

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Sørensen PMadsen J(2012)Generating Process Network Communication Infrastructure for Custom Multi-Core PlatformsInnovations in Embedded and Real-Time Systems Engineering for Communication10.4018/978-1-4666-0912-9.ch013(241-261)Online publication date: 2012
https://doi.org/10.4018/978-1-4666-0912-9.ch013
Sørensen PMadsen J(2010)Generating Process Network Communication Infrastructure for Custom Multi-Core PlatformsInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20101030031:1(37-63)Online publication date: 1-Jan-2010
https://dl.acm.org/doi/10.4018/jertcs.2010103003
Grüttner KKleen HOppenheimer FRettberg ANebel WGivargis TDonlin A(2010)Towards a synthesis semantics for systemC channelsProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1878961.1878990(163-172)Online publication date: 24-Oct-2010
https://dl.acm.org/doi/10.1145/1878961.1878990
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Published In

DAC '03: Proceedings of the 40th annual Design Automation Conference

June 2003

1014 pages

ISBN:1581136889

DOI:10.1145/775832

General Chair:
Ian Getreu
Ambric Inc., Portland, OR
,
Program Chairs:
Limor Fix
Intel Semiconductors Ltd., Haifa, Israel
,
Luciano Lavagno
Cadence Berkeley Labs., Berkeley, CA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 02 June 2003

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DAC03: 2003 40th Annual Design Automation Conference

June 2 - 6, 2003

CA, Anaheim, USA

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DAC '03 Paper Acceptance Rate 152 of 628 submissions, 24%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Sørensen PMadsen J(2012)Generating Process Network Communication Infrastructure for Custom Multi-Core PlatformsInnovations in Embedded and Real-Time Systems Engineering for Communication10.4018/978-1-4666-0912-9.ch013(241-261)Online publication date: 2012
https://doi.org/10.4018/978-1-4666-0912-9.ch013
Sørensen PMadsen J(2010)Generating Process Network Communication Infrastructure for Custom Multi-Core PlatformsInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20101030031:1(37-63)Online publication date: 1-Jan-2010
https://dl.acm.org/doi/10.4018/jertcs.2010103003
Grüttner KKleen HOppenheimer FRettberg ANebel WGivargis TDonlin A(2010)Towards a synthesis semantics for systemC channelsProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/1878961.1878990(163-172)Online publication date: 24-Oct-2010
https://dl.acm.org/doi/10.1145/1878961.1878990
Carroll D(2008)Rapid-prototyping emulation system co-emulation modelling interface for systemC real-time emulationProceedings of the 12th WSEAS international conference on Systems10.5555/1580134.1580298(691-697)Online publication date: 22-Jul-2008
https://dl.acm.org/doi/10.5555/1580134.1580298
Pimentel A(2008)The Artemis workbench for system-level performance evaluation of embedded systemsInternational Journal of Embedded Systems10.1504/IJES.2008.0202993:3(181)Online publication date: 2008
https://doi.org/10.1504/IJES.2008.020299
Moss LCantin MBois GAboulhamid E(2008)Automation of Communication Refinement and Hardware Synthesis within a System-Level Design Methodology2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping10.1109/RSP.2008.17(75-81)Online publication date: Jun-2008
https://doi.org/10.1109/RSP.2008.17
Klingauf WGädke HGünzel RGielen G(2006)TRAINProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131843(1318-1323)Online publication date: 6-Mar-2006
https://dl.acm.org/doi/10.5555/1131481.1131843
Pimentel AErbas CPolstra S(2006)A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction LevelsIEEE Transactions on Computers10.1109/TC.2006.1655:2(99-112)Online publication date: 1-Feb-2006
https://dl.acm.org/doi/10.1109/TC.2006.16
Pulka A(2006)Automated selection of embedded functions for SoC models based on IPs libraryIFAC Proceedings Volumes10.1016/S1474-6670(17)30217-339:21(389-394)Online publication date: Feb-2006
https://doi.org/10.1016/S1474-6670(17)30217-3
Gerstlauer AShin DDömer RGajski DTang T(2005)System-level communication modeling for network-on-chip synthesisProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1120740(45-48)Online publication date: 18-Jan-2005
https://dl.acm.org/doi/10.1145/1120725.1120740
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Automatic network generation for system-on-chip communication design

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