Article

Automatic network generation for system-on-chip communication design

Authors:

Andreas Gerstlauer,

Daniel D. GajskiAuthors Info & Claims

CODES+ISSS '05: Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

Pages 255 - 260

https://doi.org/10.1145/1084834.1084899

Published: 19 September 2005 Publication History

Abstract

With growing system complexities, system-level communication design is becoming increasingly important and advanced, network-oriented communication architectures become necessary. In this paper, we extend previous work on automatic communication refinement to support non-traditional, network-oriented architectures beyond a single bus. From an abstract description of the desired communication channels, the refinement tools automatically generate executable models and implementations of the system communication at various levels of abstraction. Experimental results show that significant productivity gains can be achieved, demonstrating the effectiveness of the approach for rapid, early communication design space exploration.

References

[1]

S. Abdi, et al. System-on-Chip Environment (SCE Version 2.2.0 beta): Tutorial. Technical Report CECS-TR-03-41, University of California, Irvine, 2003.

[2]

S. Abdi, et al. Automatic communication refinement in system-level design. In Proc. of DAC, 2003.

Digital Library

[3]

L. Benini, et al. Networks on chips: A new SoC paradigm. IEEE Computer, 2002.

Digital Library

[4]

I. Bolsens, et al. Hardware/Software co-design of the digital telecommunication systems. Proc. of IEEE, 1997.

[5]

W. O. Cesario, et al. Component-baed design approach for multicore SoCs. In Proc. of DAC, 2002.

Digital Library

[6]

M. Coppola, et al. IPSIM: SystemC 3.0 enhancements for communication refinement. In Proc. of DATE, 2003.

Digital Library

[7]

M. Gasteier, et al. Generation of interconnect topologies for communication synthesis. In Proc. of DATE, 1998.

Digital Library

[8]

A. Gerstlauer, et al. System-level communication modeling for Network-on-Chip synthesis. In Proc. of ASPDAC, 2005.

Digital Library

[9]

A. Gerstlauer, et al. RTOS modeling for system level design. In Proc. of DATE, 2003.

Digital Library

[10]

T. Grötker, et al. System Design with SystemC. Kluwer Academic Publishers, 2002.

Digital Library

[11]

K. Lahiri, et al. Efficient exploration of the SoC communication architecture design space. In Proc. of ICCAD, 2000.

Digital Library

[12]

D. Lyonnard, et al. Automatic generation of application-specific architectures for heterogeneous multiprocessor System-on-Chip. In Proc. of DAC, 2001.

Digital Library

[13]

R. B. Ortega, et al. Communication synthesis for distributed embedded systems. In Proc. of ICCAD, 1998.

Digital Library

[14]

J. Peng, et al. Automatic model refinement for fast architecture exploration. In Proc. of ASPDAC, 2002.

Digital Library

[15]

D. Shin, et al. Automatic generation of communication architectures. In A. Rettberg, et al., editors, From Specification to Embedded Systems Application, 2005. Springer.

[16]

T.-Y. Yen, et al. Communication synthesis for distributed embedded systems. In Proc. of ICCAD, 1995.

Digital Library

Cited By

Chung KShih TLee JHuang D(2023)Ultra-Low Crosstalk and Fabrication-Tolerant Silicon-Nitride O-Band (de)Multiplexer Using Bragg Grating-Assisted Contra-Directional CouplerIEEE Photonics Journal10.1109/JPHOT.2022.320916915:1(1-9)Online publication date: Feb-2023
https://doi.org/10.1109/JPHOT.2022.3209169
Wang JWang J(2018)IntroductionCMOS-Compatible Key Engineering Devices for High-Speed Silicon-Based Optical Interconnections10.1007/978-981-13-3378-1_1(1-14)Online publication date: 24-Nov-2018
https://doi.org/10.1007/978-981-13-3378-1_1
Sinha R(2015)Conversing at Many LayersProceedings of the 2015 20th International Conference on Engineering of Complex Computer Systems (ICECCS)10.1109/ICECCS.2015.25(170-173)Online publication date: 9-Dec-2015
https://dl.acm.org/doi/10.1109/ICECCS.2015.25
Show More Cited By

Index Terms

Automatic network generation for system-on-chip communication design
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design

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This paper presents a methodology and algorithms for automatic communication refinement. The communication refinement task in system-level synthesis transforms abstract data-transfer between components to its actual bus level implementation. The input ...

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Published In

cover image ACM Conferences

CODES+ISSS '05: Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

September 2005

356 pages

ISBN:1595931619

DOI:10.1145/1084834

General Chairs:
Petru Eles
Linköping University, Sweden
,
Axel Jantsch
Royal Institute of Technology, Sweden
,
Program Chair:
Reinaldo Bergamaschi
IBM T. J. Watson Research Center

Copyright © 2005 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 19 September 2005

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CODES/ISSS05

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CODES/ISSS05: Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis

September 19 - 21, 2005

NJ, Jersey City, USA

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CODES+ISSS '05 Paper Acceptance Rate 50 of 200 submissions, 25%;

Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

Chung KShih TLee JHuang D(2023)Ultra-Low Crosstalk and Fabrication-Tolerant Silicon-Nitride O-Band (de)Multiplexer Using Bragg Grating-Assisted Contra-Directional CouplerIEEE Photonics Journal10.1109/JPHOT.2022.320916915:1(1-9)Online publication date: Feb-2023
https://doi.org/10.1109/JPHOT.2022.3209169
Wang JWang J(2018)IntroductionCMOS-Compatible Key Engineering Devices for High-Speed Silicon-Based Optical Interconnections10.1007/978-981-13-3378-1_1(1-14)Online publication date: 24-Nov-2018
https://doi.org/10.1007/978-981-13-3378-1_1
Sinha R(2015)Conversing at Many LayersProceedings of the 2015 20th International Conference on Engineering of Complex Computer Systems (ICECCS)10.1109/ICECCS.2015.25(170-173)Online publication date: 9-Dec-2015
https://dl.acm.org/doi/10.1109/ICECCS.2015.25
Gu HXu JWang KMorton M(2010)A new distributed congestion control mechanism for networks on chipTelecommunications Systems10.1007/s11235-009-9257-744:3-4(321-331)Online publication date: 1-Aug-2010
https://dl.acm.org/doi/10.1007/s11235-009-9257-7
Gu HXu JWang ZGebotys CMartin G(2008)ODORProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450181(203-208)Online publication date: 19-Oct-2008
https://dl.acm.org/doi/10.1145/1450135.1450181
Gerstlauer AShin DPeng JDomer RGajski D(2007)Automatic Layer-Based Generation of System-On-Chip Bus Communication ModelsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2007.89579426:9(1676-1687)Online publication date: 1-Sep-2007
https://dl.acm.org/doi/10.1109/TCAD.2007.895794
Chandraiah PPeng JDomer R(2007)Creating Explicit Communication in SoC Models Using Interactive Re-CodingProceedings of the 2007 Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2007.357791(50-55)Online publication date: 23-Jan-2007
https://dl.acm.org/doi/10.1109/ASPDAC.2007.357791

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