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Optimum functional decomposition using encoding

Authors:

Rajeev Murgai,

Robert K. Brayton, and

Alberto Sangiovanni-VincentelliAuthors Info & Claims

DAC '94: Proceedings of the 31st annual Design Automation Conference

June 1994

Pages 408 - 414

https://doi.org/10.1145/196244.196440

Published: 06 June 1994 Publication History

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Cited By

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Yuan KKuo CJiang JLi MHenkel J(2013)Encoding multi-valued functions for symmetryProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561977(771-778)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561977
Yuan KKuo CJiang JLi M(2013)Encoding multi-valued functions for symmetry2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2013.6691201(771-778)Online publication date: Nov-2013
https://doi.org/10.1109/ICCAD.2013.6691201
Opara AKania D(2010)Decomposition-based logic synthesis for PAL-based CPLDsInternational Journal of Applied Mathematics and Computer Science10.2478/v10006-010-0027-120:2(367-384)Online publication date: 1-Jun-2010
https://dl.acm.org/doi/10.2478/v10006-010-0027-1
Show More Cited By

Index Terms

Optimum functional decomposition using encoding
1. Hardware
  1. Electronic design automation
    1. High-level and register-transfer level synthesis
    2. Logic synthesis
      1. Circuit optimization
  2. Very large scale integration design
    1. Application-specific VLSI designs

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Published In

DAC '94: Proceedings of the 31st annual Design Automation Conference

June 1994

739 pages

ISBN:0897916530

DOI:10.1145/196244

Chairman:
Michael Lorenzetti
Mentor Graphics Corp., Wilsonville, OR

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 06 June 1994

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DAC94: The 31st ACM/IEEE-CAS/EDAC Design Automation Conference

June 6 - 10, 1994

California, San Diego, USA

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DAC '94 Paper Acceptance Rate 100 of 260 submissions, 38%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Yuan KKuo CJiang JLi MHenkel J(2013)Encoding multi-valued functions for symmetryProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561977(771-778)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561977
Yuan KKuo CJiang JLi M(2013)Encoding multi-valued functions for symmetry2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2013.6691201(771-778)Online publication date: Nov-2013
https://doi.org/10.1109/ICCAD.2013.6691201
Opara AKania D(2010)Decomposition-based logic synthesis for PAL-based CPLDsInternational Journal of Applied Mathematics and Computer Science10.2478/v10006-010-0027-120:2(367-384)Online publication date: 1-Jun-2010
https://dl.acm.org/doi/10.2478/v10006-010-0027-1
Kania DMilik A(2010)Logic synthesis based on decomposition for CPLDsMicroprocessors & Microsystems10.1016/j.micpro.2009.11.00234:1(25-38)Online publication date: 1-Feb-2010
https://dl.acm.org/doi/10.1016/j.micpro.2009.11.002
Deniziak SWisniewski M(2008)An symbolic decomposition of functions with multi-valued inputs and outputs for FPGA-based implementation2008 International Conference on Field Programmable Logic and Applications10.1109/FPL.2008.4629970(397-402)Online publication date: Sep-2008
https://doi.org/10.1109/FPL.2008.4629970
Deniziak STomaszewski R(2008)Rapid Prototyping of NoC Architectures from a SystemC SpecificationProceedings of the 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems10.1109/DDECS.2008.4538765(1-6)Online publication date: 16-Apr-2008
https://dl.acm.org/doi/10.1109/DDECS.2008.4538765
Jhaveri T(2007)Maximization of layout printability/manufacturability by extreme layout regularityJournal of Micro/Nanolithography, MEMS, and MOEMS10.1117/1.27815836:3(031011)Online publication date: 1-Jul-2007
https://doi.org/10.1117/1.2781583
Bernd Wurth (2006)Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm32nd Design Automation Conference10.1109/DAC.1995.250063(54-59)Online publication date: Dec-2006
https://doi.org/10.1109/DAC.1995.250063
Kunz WStoffel DMenon P(2006)Logic optimization and equivalence checking by implication analysisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.59483216:3(266-281)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.594832
Jóźwiak LS´lusarczyk A(2004)General decomposition of incompletely specified sequential machines with multi-state behavior realizationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2003.11.00250:8(445-492)Online publication date: 1-Aug-2004
https://dl.acm.org/doi/10.1016/j.sysarc.2003.11.002
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Unified functional decomposition via encoding for FPGA technology mapping

Joint transceiver design for MIMO communications using geometric mean decomposition

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Unified functional decomposition via encoding for FPGA technology mapping

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