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HGA: a hardware-based genetic algorithm

Authors:

Stephen D. Scott,

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FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

Pages 53 - 59

https://doi.org/10.1145/201310.201319

Published: 15 February 1995 Publication History

Abstract

A genetic algorithm (GA) is a robust problem-solving method based on natural selection. Hardware's speed advantage and its ability to parallelize offer great rewards to genetic algorithms. Speedups of 1-3 orders of magnitude have been observed when frequently used software routines were implemented in hardware by way of reprogrammable field-programmable gate arrays (FPGAs). Reprogrammability is essential in a general-purpose GA engine because certain GA modules require changeability (e.g. the function to be optimized by the GA). Thus a hardware-based GA is both feasible and desirable. A fully functional hardware-based genetic algorithm (the HGA) is presented here as a proof-of-concept system. It was designed using VHDL to allow for easy scalability. It is designed to act as a coprocessor with the CPU of a PC. The user programs the FPGAs which implement the function to be optimized. Other GA parameters may also be specified by the user. Simulation results and performance analyses of the HGA are presented. A prototype HGA is described and compared to a similar GA implemented in software. In the simple tests, the prototype took about 6% as many clock cycles to run as the software-based GA. Further suggested improvements could realistically make the HGA 2–3 orders of magnitude faster than the software-based GA.

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https://dl.acm.org/doi/10.1145/3598421
Malhotra GDuraiswamy PKishore J(2023)Evolution of Configuration Data in CGP Format Using Parallel GA on Embryonic FabricInnovations in Bio-Inspired Computing and Applications10.1007/978-3-031-27499-2_2(16-23)Online publication date: 28-Mar-2023
https://doi.org/10.1007/978-3-031-27499-2_2
Fu ZChu SWatada JHu CPan J(2022)Software and hardware co-design and implementation of intelligent optimization algorithmsApplied Soft Computing10.1016/j.asoc.2022.109639129:COnline publication date: 1-Nov-2022
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Index Terms

HGA: a hardware-based genetic algorithm
1. Hardware
  1. Hardware validation
    1. Functional verification
  2. Very large scale integration design
    1. Application-specific VLSI designs
2. Mathematics of computing
  1. Probability and statistics
    1. Probabilistic algorithms
    2. Probabilistic reasoning algorithms
      1. Markov-chain Monte Carlo methods
      2. Sequential Monte Carlo methods

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Published In

cover image ACM Conferences

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

February 1995

174 pages

ISBN:089791743X

DOI:10.1145/201310

Chairmen:
Pak K. Chan
Univ. of California at Santa Cruz, Santa Cruz
,
Jonathan Rose
Univ. of Toronto, Toronto, Ont., Canada

Copyright © 1995 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 February 1995

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SIGDA

FPGA95: ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 12 - 14, 1995

California, Monterey, USA

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Cited By

Wang ZShi XYao X(2023)A Brain-Inspired Hardware Architecture for Evolutionary Algorithms Based on Memristive ArraysACM Transactions on Design Automation of Electronic Systems10.1145/359842128:5(1-32)Online publication date: 9-Sep-2023
https://dl.acm.org/doi/10.1145/3598421
Malhotra GDuraiswamy PKishore J(2023)Evolution of Configuration Data in CGP Format Using Parallel GA on Embryonic FabricInnovations in Bio-Inspired Computing and Applications10.1007/978-3-031-27499-2_2(16-23)Online publication date: 28-Mar-2023
https://doi.org/10.1007/978-3-031-27499-2_2
Fu ZChu SWatada JHu CPan J(2022)Software and hardware co-design and implementation of intelligent optimization algorithmsApplied Soft Computing10.1016/j.asoc.2022.109639129:COnline publication date: 1-Nov-2022
https://dl.acm.org/doi/10.1016/j.asoc.2022.109639
Ratnakumar RNanda S(2021)An improved genetic clustering architecture for real-time satellite image segmentation2021 International Conference on Advances in Technology, Management & Education (ICATME)10.1109/ICATME50232.2021.9732768(123-128)Online publication date: 8-Jan-2021
https://doi.org/10.1109/ICATME50232.2021.9732768
Psarakis MDounis AAlmabrok AStavrinidis SGkekas G(2020)An FPGA-Based Accelerated Optimization Algorithm for Real-Time ApplicationsJournal of Signal Processing Systems10.1007/s11265-020-01522-5Online publication date: 19-Feb-2020
https://doi.org/10.1007/s11265-020-01522-5
Nogueira BBarboza E(2020)A FPGA-based accelerated architecture for the Continuous GRASPComputing10.1007/s00607-020-00850-5103:7(1333-1352)Online publication date: 18-Oct-2020
https://doi.org/10.1007/s00607-020-00850-5
Ratnakumar RNanda S(2018)A Hardware Architecture Based on Genetic Clustering for Color Image SegmentationSoft Computing for Problem Solving10.1007/978-981-13-1592-3_69(863-876)Online publication date: 14-Dec-2018
https://doi.org/10.1007/978-981-13-1592-3_69
Abdoalnasir APsarakis MDounis A(2018)An Efficient FPGA Implementation of the Big Bang-Big Crunch Optimization AlgorithmApplied Reconfigurable Computing. Architectures, Tools, and Applications10.1007/978-3-319-78890-6_14(166-177)Online publication date: 8-Apr-2018
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Haddow PTyrrell A(2017)Evolvable Hardware Challenges: Past, Present and the Path to a Promising FutureInspired by Nature10.1007/978-3-319-67997-6_1(3-37)Online publication date: 27-Oct-2017
https://doi.org/10.1007/978-3-319-67997-6_1
TUNCER AYILDIRIM M(2016)Design and implementation of a genetic algorithm IP core on an FPGA for path planning of mobile robotsTURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES10.3906/elk-1502-12224(5055-5067)Online publication date: 2016
https://doi.org/10.3906/elk-1502-122
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