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Techniques for FPGA implementation of video compression systems

Authors:

Brian Schoner,

John Villasenor,

Steve Molloy,

Rajeev JainAuthors Info & Claims

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

Pages 154 - 159

https://doi.org/10.1145/201310.201334

Published: 15 February 1995 Publication History

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Abstract

Real-time video compression is a challenging subject for FPGA implementation because it typically has a large computational complexity and requires high data throughput. Previous implementations have used parallel banks of FPGAs or DSPs to meet these requirements. Using design techniques that maximize FPGA utilization, we have implemented two video compression systems, each of which uses a single FPGA. In this first system, algorithmic optimizations are made to create a low-complexity implementation that exploits the in-system programmability of the FPGA. This low-complexity implementation performs well, but is limited to a single compression algorithm. In the second system, the FPGA is augmented with an external, low-complexity, video signal processor (VSP) This combination of ASIC and FPGA is flexible enough to implement four common compression algorithms, and powerful enough to execute them in real time.

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Cited By

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Pande AZambreno JPande AZambreno J(2013)Securing Multimedia Content Using Joint Compression and EncryptionEmbedded Multimedia Security Systems10.1007/978-1-4471-4459-5_3(23-30)Online publication date: 2013
https://doi.org/10.1007/978-1-4471-4459-5_3
Gonzalez-Mora JSaez EZapata EGuil NBenavides J(2010)Computer Architectures for Multimedia and Video AnalysisHigh Performance Computing in Remote Sensing10.1201/9781420011616.ch3(43-67)Online publication date: 31-Jan-2010
https://doi.org/10.1201/9781420011616.ch3
VanCourt THerbordt M(2006)Sizing of Processing Arrays for FPGA-Based Computation2006 International Conference on Field Programmable Logic and Applications10.1109/FPL.2006.311307(1-6)Online publication date: Aug-2006
https://doi.org/10.1109/FPL.2006.311307
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Techniques for FPGA implementation of video compression systems

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Published In

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

February 1995

174 pages

ISBN:089791743X

DOI:10.1145/201310

Chairmen:
Pak K. Chan
Univ. of California at Santa Cruz, Santa Cruz
,
Jonathan Rose
Univ. of Toronto, Toronto, Ont., Canada

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 February 1995

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FPGA95

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SIGDA

FPGA95: ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 12 - 14, 1995

California, Monterey, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

View all

Pande AZambreno JPande AZambreno J(2013)Securing Multimedia Content Using Joint Compression and EncryptionEmbedded Multimedia Security Systems10.1007/978-1-4471-4459-5_3(23-30)Online publication date: 2013
https://doi.org/10.1007/978-1-4471-4459-5_3
Gonzalez-Mora JSaez EZapata EGuil NBenavides J(2010)Computer Architectures for Multimedia and Video AnalysisHigh Performance Computing in Remote Sensing10.1201/9781420011616.ch3(43-67)Online publication date: 31-Jan-2010
https://doi.org/10.1201/9781420011616.ch3
VanCourt THerbordt M(2006)Sizing of Processing Arrays for FPGA-Based Computation2006 International Conference on Field Programmable Logic and Applications10.1109/FPL.2006.311307(1-6)Online publication date: Aug-2006
https://doi.org/10.1109/FPL.2006.311307
VanCourt THerbordt M(2006)Application-Specific Memory Interleaving for FPGA-Based Grid Computations: A General Design Technique2006 International Conference on Field Programmable Logic and Applications10.1109/FPL.2006.311243(1-7)Online publication date: Aug-2006
https://doi.org/10.1109/FPL.2006.311243
Nalabalapu PSass R(2005)Bandwidth Management with a Reconfigurable Data CacheProceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 0410.1109/IPDPS.2005.121Online publication date: 4-Apr-2005
https://dl.acm.org/doi/10.1109/IPDPS.2005.121
Cong JPeck JDing YRose JEbeling C(1996)RASPProceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays10.1145/228370.228390(137-143)Online publication date: 15-Feb-1996
https://dl.acm.org/doi/10.1145/228370.228390
Short JBagrodia RKleinrock LAwerbuch BDuchamp D(1995)Mobile wireless network system simulationProceedings of the 1st annual international conference on Mobile computing and networking10.1145/215530.215575(195-209)Online publication date: 1-Dec-1995
https://dl.acm.org/doi/10.1145/215530.215575

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