research-article

Low-frequency passive RFID systems implementation in CMOS technology: design considerations and tradeoffs

Authors:

Fernando Paixão Cortes,

Rafael Schmidt,

Laurent Courcelle,

Murilo PessattiAuthors Info & Claims

SBCCI '11: Proceedings of the 24th symposium on Integrated circuits and systems design

Pages 1 - 4

https://doi.org/10.1145/2020876.2020878

Published: 30 August 2011 Publication History

Get Access

Abstract

Radio Frequency Identification (RFID) systems are widely used in a variety of tracking, security and tagging applications. Passive low-frequency (LF) RFID systems have a large installed base, mostly used for animal tagging and supply chain applications. Passive RFID tags generate their power from the incoming signal; therefore, they do not require a power source. Accordingly, minimizing the power consumption and the implementation area are usually the main design considerations. This paper presents a complete analysis on designing a passive LF RFID tag in CMOS process. A complete architecture for a LF passive RFID tag is presented and analyzed, together with a brief discussion of its main building blocks such as rectifier, voltage clamps, modulator, voltage regulator and voltage/current references. The IC was fabricated in 0.6µm CMOS process. The tag system uses a carrier frequency of 134.2kHz, 128bit one-time programmable memory, DBP codification and ASK modulation in the reverse link (tag to reader). Measurement results are given.

References

[1]

Finkenzeller, K. 2003. RFID Handbook. John Wiley & Sons Ltd., Chichester, England.

Google Scholar

[2]

Hussien, F. A., Turker, D. Z., Srinivasan, R., Mobarak, M. S., Cortes, F. P. and Sanchez-Sinencio, E. 2005. Design Considerations and tradeoffs for passive RFID tags. In Proceedings of SPIE VLSI Circuits and Systems Conference (Sevilla, Spain, May 9--11, 2005).

Crossref

Google Scholar

[3]

Khaw, M. K., Mohd-Yasin, F. and Reaz, M. I. 2004. Recent Advances in the Integrated Circuit Design of RFID Transponder. In Proceedings of IEEE International Conference on Semiconductor Electronics - ICSE 2004 (Kuala Lumpur, Malaysia, 7--9 Dec. 2004).

Crossref

Google Scholar

[4]

Kaiser, U. and Steinhagen, W. 1995. A Low-Power Transponder IC for High-Performance Identification Systems. IEEE Journal of Solid-State Circuits, vol. 30, no. 3, March 1995.

Crossref

Google Scholar

[5]

ISO11784/ISO11485. International Standard: Radio-frequency identification of animals - Code structure and Technical concepts. {S.l.}.

Google Scholar

[6]

Zhu, Z., Jamali, B. and Cole, P. H. 2004. Brief Comparison of Different Rectifier Structures for RFID Transponders. Auto-ID labs workshop, St Gallen, Switzerland, Sept. 2004.

Google Scholar

[7]

Gupta, V. and Rincon-Mora, G. A. 2002. Predicting the Effects of Error Sources in Bandgap Reference Circuits and Evaluating their Design Implications. In Proceedings IEEE's Midwest Symposium on Circuits and Systems (MWSCAS) (Tulsa, Oklahoma, 2002).

Google Scholar

[8]

Rincon-Mora, G. A. and Allen, P. E. 1998. A low-voltage, low quiescent current, low drop-out regulator. IEEE Journal of Solid-State Circuits, vol. 33, pp. 36--44, January 1998.

Crossref

Google Scholar

[9]

Balachandran, G. K. and Barnett, R. E. A high dynamic range ASK demodulator for passive UHF RFID with automatic over-voltage protection and detection threshold adjustment. In Proceedings of IEEE Custom Integrated Circuits Conference (CICC) 2009. (San Jose, CA, USA, 13-16 Sept. 2009).

Crossref

Google Scholar

[10]

Pan, F. and Samaddar, T. 2006. Charge Pump Circuit Design. MacGraw-Hill Inc., NY, USA.

Google Scholar

Cited By

View all

Vestenický PHruboš MKolla E(2023)Evaluation of Contactless Identification Card Immunity against a Current Pulse in an Adjacent ConductorElectronics10.3390/electronics1223487512:23(4875)Online publication date: 3-Dec-2023
https://doi.org/10.3390/electronics12234875
Vestenicky PVestenicky M(2018)Mathematical model of non-linear RFID reader — Transponder system2018 ELEKTRO10.1109/ELEKTRO.2018.8398313(1-4)Online publication date: May-2018
https://doi.org/10.1109/ELEKTRO.2018.8398313
de Freitas JGhignatti ECortes FS. JOlmos ALubaszewski M(2015)Area optimization methodology for RFIDs combining capacitors placement within digital circuitry2015 IEEE Brasil RFID10.1109/BrasilRFID.2015.7523831(1-4)Online publication date: Oct-2015
https://doi.org/10.1109/BrasilRFID.2015.7523831
Show More Cited By

Index Terms

Low-frequency passive RFID systems implementation in CMOS technology: design considerations and tradeoffs
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Partitioning and floorplanning
  2. Hardware validation
    1. Functional verification
      1. Simulation and emulation

Recommendations

A power management system architecture for LF passive RFID tags

This paper presents a low power, low voltage power management (PM) system for low-frequency passive RFID tags in a standard CMOS 0.18 µm technology. Passive tags have no internal power source but use the incoming RF energy transmitted by a transceiver ...
Design issues of a low power wideband frequency doubler implementation in 0.18 μm CMOS

This paper presents design issues of a wideband, low power implementation of a frequency doubler (FD) in a commercial 0.18 μm CMOS process. The FD consists of two identical unbalanced source-coupled pairs with different width-to-length ( W / L ) ...
New design of RF rectifier for passive UHF RFID transponders

A novel diode-connected MOS transistor for ultra-high-frequency (UHF) micro-power rectifiers was presented, and a high efficiency N-stage charge pump voltage rectifier based on this new diode-connected MOS transistor was designed and implemented. The ...

Comments

Information & Contributors

Information

Published In

SBCCI '11: Proceedings of the 24th symposium on Integrated circuits and systems design

August 2011

244 pages

ISBN:9781450308281

DOI:10.1145/2020876

General Chair:
Antonio Carlos Cavalcanti
Federal University of Paraíba, Brazil
,
Program Chairs:
Elmar Uwe Kurl Melcher
Federal University of Campina Grande, Brazil
,
Jürgen Becker
Karlsruhe Institute of Technology (KIT), DE

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 30 August 2011

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Conference

SBCCI '11

Sponsor:

SIGDA

SBCCI '11: 24th Symposium on Integrated Circuits and Systems Design

August 30 - September 2, 2011

João Pessoa, Brazil

Acceptance Rates

Overall Acceptance Rate 133 of 347 submissions, 38%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

5
Total Citations
View Citations
166
Total Downloads

Downloads (Last 12 months)4
Downloads (Last 6 weeks)0

Reflects downloads up to 03 Feb 2025

Other Metrics

View Author Metrics

Citations

Cited By

View all

Vestenický PHruboš MKolla E(2023)Evaluation of Contactless Identification Card Immunity against a Current Pulse in an Adjacent ConductorElectronics10.3390/electronics1223487512:23(4875)Online publication date: 3-Dec-2023
https://doi.org/10.3390/electronics12234875
Vestenicky PVestenicky M(2018)Mathematical model of non-linear RFID reader — Transponder system2018 ELEKTRO10.1109/ELEKTRO.2018.8398313(1-4)Online publication date: May-2018
https://doi.org/10.1109/ELEKTRO.2018.8398313
de Freitas JGhignatti ECortes FS. JOlmos ALubaszewski M(2015)Area optimization methodology for RFIDs combining capacitors placement within digital circuitry2015 IEEE Brasil RFID10.1109/BrasilRFID.2015.7523831(1-4)Online publication date: Oct-2015
https://doi.org/10.1109/BrasilRFID.2015.7523831
Cortes FMartinez Brito JCantalice RGhignatti EOlmos AChavez FLubaszewski M(2014)A low-power RF/analog front-end architecture for LF passive RFID tags with dynamic power sensing2014 IEEE International Conference on RFID (IEEE RFID)10.1109/RFID.2014.6810713(60-66)Online publication date: Apr-2014
https://doi.org/10.1109/RFID.2014.6810713
Cortes FFreitas GPimentel HBrito JChavez F(2013)Low-Power/Low-Voltage analog front-end for LF passive RFID tag systems2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)10.1109/SBCCI.2013.6644868(1-6)Online publication date: Sep-2013
https://doi.org/10.1109/SBCCI.2013.6644868

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Abstract

References

Cited By

Index Terms

Recommendations

A power management system architecture for LF passive RFID tags

Design issues of a low power wideband frequency doubler implementation in 0.18 μm CMOS

New design of RF rectifier for passive UHF RFID transponders

Comments

Information

Published In

Sponsors

Publisher

Publication History

Permissions

Check for updates

Author Tags

Qualifiers

Conference

Acceptance Rates

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

Login options

Full Access

View options

PDF

eReader

Share

Share this Publication link

Share on social media

Affiliations