Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.1145/207110.207128acmconferencesArticle/Chapter ViewAbstractPublication PagespldiConference Proceedingsconference-collections
Article
Free access

Scheduling and mapping: software pipelining in the presence of structural hazards

Published: 01 June 1995 Publication History
  • Get Citation Alerts
  • Abstract

    Recently, software pipelining methods based on an ILP (Integer Linear Programming) framework have been successfully applied to derive rate-optimal schedules for architectures involving clean pipelines - pipelines without structural hazards. The problem for architectures beyond such clean pipelines remains open. One challenge is how, under a unified ILP framework, to simultaneously represent resource constraints for unclean pipelines, and the assignment or mapping of operations from a loop to those pipelines. In this paper we provide a framework which does exactly this, and in addition constructs rate-optimal software pipelined schedules. The proposed formulation and a solution method have been implemented and tested on a set of 1006 loops taken from various scientific and integer benchmark suites. The formulation found a rate-optimal schedule for 75% of the loops, and required a median time of only 2 seconds per loop on a Sparc 10/30.

    References

    [1]
    A. Aiken and A. Nicolau. cprimal loop parallelization. tn Proc. of the SIGPLAN '88 Conf. on Programming Language Design and Implementation, pages 308-317, Atlanta, Georgia, Jun. 22-24, 1988.
    [2]
    E.R Altman. Two Approaches for Optimal Software Pipelining with Resource Constraints (In Preparation). PhD thesis, McGill U., Montreal, Que., 1995.
    [3]
    R. P. Colwei1, R. P. Nix, J. J. O'Donnell, D. B. Papworth, and P. K. Rodman. A VLIW architecture for a trace scheduling compiler. IEEE Trans. on Computers, pages 967-979, Aug. 1988.
    [4]
    J. C. Dehnert and R. A. Towle. Compiling for Cydra 5.tovrnal of Supercomputing, 7:181-227, May 1993.
    [5]
    A. E. Eichenberger, E. S. Davidson, and S. G. Abraham. Minimum register requirements for a modulo schedule. In Proc. of the 27th Ann. Intl. Syrup. on M~croarchitecture, pages 75-84, San Jose, Calif., Nov. 30-Dec.2, 1994.
    [6]
    P. Feautrier. Fine-grMn Scheduling under Resource Constraints. In Seventh Annual Workshop on Languages and Compilers for Parallel Computing, Ithaca, USA, August 1994.
    [7]
    F. Gasperoni and U. Schwiegelshohn. Efficient algorithms for cyclic scheduling. Rcs. Rep. RC 17068, IBM T. J. Watson Res. Center, Yorktown Heights, 1991.
    [8]
    R. Govindarajan, E. R. Altman, and G. R. Gao. Coscheduling hardware and software pipelines. ACAPS Technical Memo 92, School of Computer Science, McGill University, Montreal, Que., 1995.
    [9]
    R. Govindarajan, E. R. Altman, and G. R. Gao. Minimizing register requirements under resourceconstrained rate-optimal software pipelining. In Proc. of the 27th Ann. Intl. Syrup. on Microarchitecture, pages 85-94, San Jose, C~tif., Nov. 30-Dec.2, 1994.
    [10]
    L. J. Hendren, G. R. Gao, E. R. Altman, and C. Mukerji. A register allocation framework based on hierarchical cyclic intervM graphs. In U. Kastens and P. Pfahter, editors, Proc. of the Intl. Conf. on Compiler Construction, number 641 in Lec. Notes in Comp. Sci., pages 176-191. Springer-Verlag, Oct. 1992.
    [11]
    P.Y.T. Hsu. Highly concurrent scalar processing. Technical report, University of Illinois at Urbana- Ch~tmpagne, Urb~na, IL, 1986. Ph.D. Thesis,
    [12]
    T. C. Hu. Integer Programming and Network Flows, page 270. Addison-Wesley Pub. Co., 1969.
    [13]
    R. A. Huff. Lifetime-sensitive modulo scheduling. In Proc. of the SIGPLAN '93 Conf. on Programming Language Design and Implementation, pages 258-267, Albuquerque, N. Mex., Jun. 23-25, 1993.
    [14]
    IBM/Motorola. PowerPC 604 RISC Microprocessor Technical Summary, 1994.
    [15]
    P. M. Kogge. The Architecture of Pzpehned Computers. McGraw-Hill Book Company, New York, N. Y., 1981.
    [16]
    M. Lam. Software pipelining: An effective scheduling technique for VLIW machines. In Proc. of the SIC- PLAN '88 Conf. on Programming Language Design and Implementation, p~ges 318-328, Atlanta, Georgia, Jun. 22-24, 1988.
    [17]
    S-M. Moon and K. Ebcioglu. An efficient resourceconstrained global scheduling technique for superscalar and VLIW processors. In Proc. of the 25th Ann. Intl. Syrup. on Microarchitecture, pages 55-71, Portland, Ore., Dec. 1-4, 1992.
    [18]
    Q. Ning and G. R. Gao. A novel framework of register allocation for software pipelining. In Conf. Rec. of the Twentieth Ann. A CM SIGPLAN-SICA CT Syrup. on Principles of Programming Languages, pages 29-42, Charleston, South C~rolina, Jan. I0-13, 1993.
    [19]
    B. R. Rau and J. A. Fisher. Instruction-level parallel processing: History, overview and perspective. J. of Supercomputing, 7:9-50, May 1993.
    [20]
    B. R. Rau and C. D. Glaeser. Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing. In Proc. of the 1Jth Ann. Microprogramming Work., pages 183-198, Chatham, Mass., Oct. 12-15, 1981.
    [21]
    B. R. Rau, M. Lee, P. P. Tirumalai, and M. S. Schlansker. Register allocation for software pipelined loops. In Proc. of the SIGPLAN '92 Conf. on Programming Language Deszgn and Implementation, pages 283-299, San Francisco, Calif., Jun. 17-19, 1992.
    [22]
    B. R. Rau. Iterative modulo scheduling: An algorithm for software pipelining loops, tn Proc. of the 27th Ann. Intl. Syrup. on Mzcroarchitccture, pages 63- 74, San Jose, Calif., Nov. 30-Dec.2, 1994.
    [23]
    R. Reiter. Scheduling parallel computations. J. of the ACM, 15(4):590-599, Oct. 1968.
    [24]
    V. Van Dongen, G. R. Gao, and Q. Ning. A polynomial time method for optimal software pipetining. In Proc. of the Conf. on Vector and Parallel Processzng, CONPAR-92, number 634 in Lec. Notes in Comp. Sci., pages 613-624, Lyon, France, Sep. 1-4, 1992.
    [25]
    S. R. Vegdahl. A Dynamic Programming Technique for Compacting Loops. In Proc. of the 25th Ann. Intl. Symp. on Microarchitecture, pages 180-188, Portland, Ore., Dec. 1-4, 1992.
    [26]
    J. Wang and E. Eisenbeis. A new approach to software pipelining of complicated loops with branches. Res. rep., INRIA, Rocquencourt, France, Jan. 1993,
    [27]
    N. J. Warter, J. w. Bockhaus, G. E. Haab, and K. Subramanian. Enhanced modulo scheduling for loops with conditionM branches. In Proc. of the 25th Ann. Intl. Symp. on Microarchitecture, pages 170-179, Portland, Ore., Dec. 1-4, 1992.

    Cited By

    View all
    • (2019)Exact and Practical Modulo Scheduling for High-Level SynthesisACM Transactions on Reconfigurable Technology and Systems10.1145/331767012:2(1-26)Online publication date: 6-May-2019
    • (2017)Iteratively Intervening with the “Most Difficult” Topics of an Algorithms and Complexity CourseACM Transactions on Computing Education10.1145/301810917:1(1-38)Online publication date: 6-Jan-2017
    • (2016)Computer Science Education for Primary and Lower Secondary School StudentsACM Transactions on Computing Education10.1145/294033117:1(1-28)Online publication date: 29-Sep-2016
    • Show More Cited By

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    PLDI '95: Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
    June 1995
    335 pages
    ISBN:0897916972
    DOI:10.1145/207110
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 01 June 1995

    Permissions

    Request permissions for this article.

    Check for updates

    Qualifiers

    • Article

    Conference

    PLDI95
    Sponsor:

    Acceptance Rates

    PLDI '95 Paper Acceptance Rate 28 of 105 submissions, 27%;
    Overall Acceptance Rate 406 of 2,067 submissions, 20%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)75
    • Downloads (Last 6 weeks)13
    Reflects downloads up to 26 Jul 2024

    Other Metrics

    Citations

    Cited By

    View all
    • (2019)Exact and Practical Modulo Scheduling for High-Level SynthesisACM Transactions on Reconfigurable Technology and Systems10.1145/331767012:2(1-26)Online publication date: 6-May-2019
    • (2017)Iteratively Intervening with the “Most Difficult” Topics of an Algorithms and Complexity CourseACM Transactions on Computing Education10.1145/301810917:1(1-38)Online publication date: 6-Jan-2017
    • (2016)Computer Science Education for Primary and Lower Secondary School StudentsACM Transactions on Computing Education10.1145/294033117:1(1-28)Online publication date: 29-Sep-2016
    • (2016)How Do Different Cognitive Styles Affect Learning Programming? Insights from a Game-Based Approach in Greek SchoolsACM Transactions on Computing Education10.1145/294033017:1(1-25)Online publication date: 29-Sep-2016
    • (2016)Ultra-Low-Leakage and High-Performance Logic Circuit Design Using Multiparameter Asymmetric FinFETsACM Journal on Emerging Technologies in Computing Systems10.1145/283291312:4(1-25)Online publication date: 15-Mar-2016
    • (2016)A Novel Approach to Optimize Fault-Tolerant Hybrid Wireless Network-on-Chip ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/281457212:4(1-37)Online publication date: 15-Mar-2016
    • (2015)PROTON+ACM Journal on Emerging Technologies in Computing Systems10.1145/283071612:4(1-28)Online publication date: 18-Dec-2015
    • (2015)A Survey of Architectural Techniques for Near-Threshold ComputingACM Journal on Emerging Technologies in Computing Systems10.1145/282151012:4(1-26)Online publication date: 28-Dec-2015
    • (2015)Density-Aware Clustering Based on Aggregated Heat Kernel and Its TransformationACM Transactions on Knowledge Discovery from Data10.1145/27003859:4(1-35)Online publication date: 1-Jun-2015
    • (2014)Author retrospective for optimum modulo schedules for minimum register requirementsACM International Conference on Supercomputing 25th Anniversary Volume10.1145/2591635.2591653(35-36)Online publication date: 10-Jun-2014
    • Show More Cited By

    View Options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Get Access

    Login options

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media