research-article

A fast discrete placement algorithm for FPGAs

Authors:

Kenneth S. McElvainAuthors Info & Claims

FPGA '12: Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays

Pages 115 - 118

https://doi.org/10.1145/2145694.2145713

Published: 22 February 2012 Publication History

Abstract

Good FPGA placement is crucial to obtain the best Quality of Results (QoR) from FPGA hardware. Although many published global placement techniques place objects in a continuous ASIC-like environment, FPGAs are discrete in nature, and a continuous algorithm cannot always achieve superior QoR by itself. Therefore, discrete FPGA-specific detail placement algorithms are used to improve the global placement results. Unfortunately, most of these detail placement algorithms do not have a global view. This paper presents a discrete "middle" placer that fills the gap between the two placement steps. It works like simulated annealing, but leverages various acceleration techniques. It does not pay the runtime penalty typical of simulated annealing solutions. Experiments show that with this placer, final QoR is significantly better than with the global-detail placer approach.

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Cited By

Adams JZhang JSherriff MHeckman SCutter PMonge A(2020)Creating a Balanced Data Science ProgramProceedings of the 51st ACM Technical Symposium on Computer Science Education10.1145/3328778.3366800(185-191)Online publication date: 26-Feb-2020
https://dl.acm.org/doi/10.1145/3328778.3366800
Laforest CAnderson J(2017)Microarchitectural Comparison of the MXP and Octavo Soft-Processor FPGA OverlaysACM Transactions on Reconfigurable Technology and Systems10.1145/305367910:3(1-25)Online publication date: 27-May-2017
https://dl.acm.org/doi/10.1145/3053679
Hutton MBetz VAnderson J(2016)FPGA Synthesis and Physical DesignElectronic Design Automation for IC Implementation, Circuit Design, and Process Technology10.1201/b19714-18(373-413)Online publication date: 14-Apr-2016
https://doi.org/10.1201/b19714-18
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Index Terms

A fast discrete placement algorithm for FPGAs
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement
      2. Wire routing

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Published In

cover image ACM Conferences

FPGA '12: Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays

February 2012

352 pages

ISBN:9781450311557

DOI:10.1145/2145694

General Chair:
Katherine Compton
University of Wisconsin-Madison
,
Program Chair:
Brad Hutchings
Brigham Young University

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation

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Association for Computing Machinery

New York, NY, United States

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Published: 22 February 2012

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FPGA '12

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SIGDA

FPGA '12: ACM/SIGDA International Symposium on Field Programmable Gate Arrays

February 22 - 24, 2012

California, Monterey, USA

Acceptance Rates

FPGA '12 Paper Acceptance Rate 20 of 87 submissions, 23%;

Overall Acceptance Rate 125 of 627 submissions, 20%

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FPGA '25

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The 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays

February 27 - March 1, 2025

Monterey , CA , USA

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Cited By

Adams JZhang JSherriff MHeckman SCutter PMonge A(2020)Creating a Balanced Data Science ProgramProceedings of the 51st ACM Technical Symposium on Computer Science Education10.1145/3328778.3366800(185-191)Online publication date: 26-Feb-2020
https://dl.acm.org/doi/10.1145/3328778.3366800
Laforest CAnderson J(2017)Microarchitectural Comparison of the MXP and Octavo Soft-Processor FPGA OverlaysACM Transactions on Reconfigurable Technology and Systems10.1145/305367910:3(1-25)Online publication date: 27-May-2017
https://dl.acm.org/doi/10.1145/3053679
Hutton MBetz VAnderson J(2016)FPGA Synthesis and Physical DesignElectronic Design Automation for IC Implementation, Circuit Design, and Process Technology10.1201/b19714-18(373-413)Online publication date: 14-Apr-2016
https://doi.org/10.1201/b19714-18
Ferreira RRocha LSantos ANacif JWong SCarro L(2015)A Runtime FPGA Placement and Routing Using Low-Complexity Graph TraversalACM Transactions on Reconfigurable Technology and Systems10.1145/26607758:2(1-16)Online publication date: 17-Mar-2015
https://dl.acm.org/doi/10.1145/2660775
An MSteffan JBetz V(2014)Speeding Up FPGA Placement: Parallel Algorithms and Methods2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2014.60(178-185)Online publication date: May-2014
https://doi.org/10.1109/FCCM.2014.60
Huang CHsiung P(2013)Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systemsACM Transactions on Reconfigurable Technology and Systems10.1145/2499625.24996286:2(1-18)Online publication date: 2-Aug-2013
https://dl.acm.org/doi/10.1145/2499625.2499628
Das JWilton S(2013)Towards development of an analytical model relating FPGA architecture parameters to routabilityACM Transactions on Reconfigurable Technology and Systems10.1145/2499625.24996276:2(1-24)Online publication date: 2-Aug-2013
https://dl.acm.org/doi/10.1145/2499625.2499627
Heisswolf JZaib AWeichslgartner AKönig RWild TTeich JHerkersdorf ABecker J(2013)Virtual networks -- distributed communication resource managementACM Transactions on Reconfigurable Technology and Systems10.1145/24921866:2(1-14)Online publication date: 2-Aug-2013
https://dl.acm.org/doi/10.1145/2492186
Sidiropoulos HSiozios KFiguli PSoudris DHübner MBecker J(2013)JITPRACM Transactions on Reconfigurable Technology and Systems10.1145/24921856:2(1-12)Online publication date: 2-Aug-2013
https://dl.acm.org/doi/10.1145/2492185
Fujita SFujino A(2013)Word Sense Disambiguation by Combining Labeled Data Expansion and Semi-Supervised Learning MethodACM Transactions on Asian Language Information Processing10.1145/2461316.246131912:2(1-26)Online publication date: 1-Jun-2013
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